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Marvell Technology

Package Design, Signal and Power Integrity Senior Staff Engineer

Posted 3 Days Ago
Be an Early Applicant
In-Office
Santa Clara, CA, USA
141K-211K Annually
Senior level
In-Office
Santa Clara, CA, USA
141K-211K Annually
Senior level
Designs and validates high-speed semiconductor IC packages supporting 448 Gb/s and beyond. Responsibilities include package interconnect design, signal and power integrity modeling, EM simulation, power delivery analysis, methodology development, measurement correlation, and root-cause investigation. The engineer develops design rules and solutions for custom interfaces, collaborates across packaging and IC teams, and may automate workflows using Python. Work includes lab characterization with VNA and TDR equipment and advanced 2.5D/3D packaging development.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, Marvell’s innovative technologies enable new possibilities and power the next generation of performance‑driven systems.
Within this ecosystem, Marvell’s central advanced packaging organization plays a critical role in delivering next‑generation connectivity and compute products. The organization brings deep expertise in architecture, package design, and electrical performance, including SI/PI to develop advanced IC packages that support high‑speed interfaces. This work directly shapes product performance, reliability, and time‑to‑market, making it a key contributor to Marvell’s overall technology leadership.

What You Can Expect

Marvell’s Central Engineering team is seeking a talented High-speed IC package SI/PI design engineer to contribute to the development of advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates and beyond.

 

This role requires an engineer who can operate independently in technically ambiguous areas, identify gaps and work towards developing improved approaches when needed.

 

The engineer will be responsible for package interconnect design, modeling, and characterization, power delivery, simulation methodology development and correlation with measurements.

 

Role will also involve working on custom high-speed interfaces where established design methodologies may not exist. The engineer will work with cross-functional team to explore new interconnect architectures, develop design rules and invent practical solutions.

 

 

What We're Looking For

  • MS/PhD  Electrical Engineering, Computer Engineering with relevant industry experience.
  • Strong understanding of transmission line theory & EM fundamentals.
  • Deep understanding of frequency and time domain analysis in high speed design.
  • Demonstrated ability to independently solve complex SI/PI problems.
  • Experience driving SI/PI design from architecture through implementation & validation.
  • Experience with developing SI/PI workflows and investigating tool trade-offs.
  • Experience in using 2-D and 3-D EM simulation tools such as Ansys HFSS, SI-Wave, Cadence Clarity
  • Power plane design, modeling and analysis using tools like PowerSI, Siwave
  • Working knowledge of channel & circuit simulators like ADS, Hspice.
  • Proven track-record of investigating channel/PDN behavior systematically and establish root-cause.
  • Experience with lab measurements and equipment such as VNA, TDR etc.
  • Familiarity with layout tools like Allegro, APD or PADS.
  • Strong team player with communication, presentation, and documentation skills.

Highly Desired


  • Familiarity with packaging technologies, materials, package substrate design rules and assembly rules
  • Knowledge of the thermal and mechanical analysis of the IC package development.
  • Experience with high-speed electronic packaging for digital and analog Ics
  • Experience with 2.5D/3D package development.
  • Experience with CPC/CPO connectors.
  • Ability to automate the SI, PI and Packaging activities using scripting tools like Python.
  • Ability to manage package development involving various cross functional teams like assembly development, IC physical layout teams, Analog and Digital designers, marketing.

Expected Base Pay Range (USD)

141,150 - 211,400, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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HQ

Marvell Technology Santa Clara, California, USA Office

5488 Marvell Ln, Santa Clara, CA, United States, 95054

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