Astera Labs Logo

Astera Labs

Product Quality Engineer (NCG)

Reposted One Month Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
120K-140K Annually
Junior
In-Office
San Jose, CA, USA
120K-140K Annually
Junior
The Product Quality Engineer will perform failure analysis, drive root-cause identification, collaborate with teams, and utilize lab instrumentation to ensure high-quality AI connectivity solutions.
The summary above was generated by AI

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Role Overview


 

Astera Labs is seeking a Quality Engineer to join our Product Quality Engineering team in San Jose, CA. This is an exciting opportunity for an early-career engineer to dive into the heart of AI infrastructure connectivity, working hands-on with cutting-edge semiconductor devices that power the world's most advanced data centers.


 

In this role, you will be instrumental in driving root-cause analysis of failures across circuit, package, firmware, and protocol layers — directly impacting the reliability and quality of our PCIe and Ethernet connectivity solutions. You'll work with state-of-the-art lab instrumentation, build infrastructure to accelerate failure analysis, and collaborate across engineering disciplines to ensure Astera Labs continues to deliver best-in-class silicon to hyperscale customers. If you're passionate about high-speed SERDES, signal integrity, and solving complex hardware problems at the intersection of AI and connectivity, this is the role for you.


 

Key Responsibilities


 

  • Failure Analysis & Root-Cause Infrastructure

    • Enable and develop infrastructure such as databases to optimize and reduce time to root-cause failures in circuit, package, firmware, or protocol-level iterations
    • Participate in the new product development process to enable improvements and capabilities for failure analysis
    • Document product quality engineering processes and methodologies to ensure repeatability and scalability
  • Lab Measurement & Debug

    • Perform measurements on high-speed SERDES, PCIe, and Ethernet devices to characterize and debug quality issues
    • Set up and use advanced lab instrumentation including BERT, high-bandwidth oscilloscopes, protocol analyzers, VNAs, TDR, and spectrum analyzers to support debug and root-cause activities
  • Cross-Functional Collaboration

    • Collaborate with design, validation, hardware, and system engineering teams to resolve quality issues and drive continuous improvement
    • Support cross-functional efforts to improve product reliability and manufacturing quality

 

Basic Qualifications


 

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
  • Understanding of high-speed serial interfaces (PCIe, Ethernet, SERDES)
  • Familiarity with lab instrumentation such as oscilloscopes, BERT, TDR, or spectrum analyzers
  • Strong analytical and problem-solving skills
  • Excellent documentation and communication skills

 

Preferred Qualifications


 

  • Internship or project experience in semiconductor quality, product engineering, or hardware validation
  • Exposure to signal integrity concepts and high-speed measurement techniques
  • Experience with database tools or scripting languages (Python, SQL) for data analysis and infrastructure development
  • Familiarity with failure analysis methodologies in a semiconductor environment
  • Knowledge of PCIe or Ethernet protocol specifications

 

The salary range for this position is $120,000 to $140,000 depending on experience and education level. This role may be eligible for discretionary bonus, incentives and benefits.


We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

HQ

Astera Labs San Jose, California, USA Office

San Jose, CA, United States

Similar Jobs

25 Minutes Ago
In-Office
San Mateo, CA, USA
160K-250K Annually
Senior level
160K-250K Annually
Senior level
Aerospace • Artificial Intelligence • Machine Learning • Robotics • Software
Lead end-to-end delivery of Oracle Fusion ERP implementations and finance transformation programs. Manage integrated schedules, cross-functional workstreams, vendors, risks, governance, and go-live/hypercare activities to ensure on-time execution, stakeholder alignment, and sustainable business adoption.
Top Skills: Cloud ErpHcmOracle ErpOracle Fusion ErpProcurementReporting/AnalyticsSupply Chain
29 Minutes Ago
Remote or Hybrid
US
95K-132K Annually
Senior level
95K-132K Annually
Senior level
Information Technology
Provides national technical presales leadership for NetApp storage, data management, data protection, cyber resiliency, hybrid cloud, and AI infrastructure solutions. Partners with customers, sellers, engineers, services teams, and NetApp to design architectures, conduct workshops, develop proposals and bills of material, support strategic sales opportunities, and communicate technical value. Acts as a NetApp subject matter expert, mentors field teams, maintains certifications, and develops reusable solution assets.
Top Skills: Ai InfrastructureAmazon Web ServicesCloud StorageContainersCyber ResiliencyData ProtectionEnterprise StorageGCPHybrid CloudKubernetesAzureNetappOntapRed Hat OpenshiftVirtualizationVmware Cloud Foundation
30 Minutes Ago
Hybrid
150K-262K Annually
Expert/Leader
150K-262K Annually
Expert/Leader
Artificial Intelligence • Cloud • HR Tech • Information Technology • Productivity • Software • Automation
Leads platform engineering across DevOps, deployment, performance engineering, and AI-native tooling. Owns CI/CD enablement, internal developer platforms, observability, performance tooling, agentic AI integrations, and cross-team platform roadmaps. Designs scalable services and testing strategies, improves developer productivity, mentors engineers, drives technical standards, and coordinates governance and delivery across engineering organizations.
Top Skills: A2AGithub ActionsGrafanaJavaJavaScriptJenkinsKubernetesLitMcpOpentelemetryPrometheusPythonServicenow

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account