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Sapsol Technologies Inc

R&D Engineer

Posted One Month Ago
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In-Office
Mountain View, CA, USA
Entry level
In-Office
Mountain View, CA, USA
Entry level
Validates and sanity-checks FPGA prototyping designs on hardware, migrates and optimizes designs across Synopsys hardware platforms, creates and edits user documentation, and conducts laboratory hardware experiments. Maintains lab setups and equipment, establishes personal task schedules, and supports project goals assigned by other engineers.
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Responsible for

  1. Validate and sanity check existing FPGA protoyping design on hardware.
  2. Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.
  3. Create and edit user documents
  4. Work in the lab to conduct hardware experiment including maintaining setups and equipment

Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.

 
Responsible for

  1. Validate and sanity check existing FPGA protoyping design on hardware.
  2. Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.
  3. Create and edit user documents
  4. Work in the lab to conduct hardware experiment including maintaining setups and equipment

Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.


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