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HP IQ

Lead Antenna Engineer

Reposted 6 Days Ago
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In-Office
San Francisco, CA
140K-225K Annually
Senior level
Easy Apply
In-Office
San Francisco, CA
140K-225K Annually
Senior level
As a Senior Antenna Engineer, you will design, prototype, and test high-performance antennas for consumer electronics, ensuring compliance and performance throughout the product development cycle.
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Who We Are

HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates.

We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless.

We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset.

By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work.

Join us as we reinvent work, so people everywhere can do their best work.

About The Role

HP IQ’s Wireless Technology Team works cross-functionally with electrical engineering, software, product design, industrial design, program management, and operations to deliver successful products to market. As a Senior Antenna Engineer, you will drive the product from conception to production. This includes simulations, prototyping, measurements (in the field and in the lab, both active and passive), writing antenna specifications and test plans, reviewing compliance lab reports, and leading efforts to resolve antenna-related challenges that arise.

What You Might Do

  • Lead the architecture and end-to-end design of high-performance antenna systems across the full product development lifecycle, from concept through mass production.
  • Define antenna and RF system strategy for next-generation wireless products, aligning technical direction with product roadmap and business goals.
  • Drive EMI and RF desense mitigation through advanced simulations and testing to meet regulatory and performance requirements.
  • Partner with manufacturing teams to ensure robust, high-quality antenna system implementation.
  • Utilize industry-standard tools (XFDTD, HFSS, CST, etc.) for accurate simulation modeling; perform material characterization, prototype development, and anechoic chamber measurements (ETS).
  • Generate clear, data-driven reports and presentations to communicate findings and design decisions.
  • Innovate antenna solutions optimized for small form-factor devices.
  • Collaborate closely with internal cross-functional teams and external JDM/CM partners to successfully launch wireless products to market.

Essential Qualifications

  • 10+ years of experience shipping high-volume consumer electronics products with multiple wireless communication technologies.
  • Deep expertise in antenna design and electromagnetics, with proven experience delivering antennas for consumer electronics and wearable devices.
  • Proficient in EM simulation tools (ANSYS HFSS, CST) and skilled in Matlab or equivalent platforms for data analysis and post-processing.
  • Hands-on experience with RF lab equipment, including 3D anechoic chambers, VNAs, and spectrum analyzers for antenna and RF subsystem validation.
  • Strong ability to balance cost, performance, and form factor trade-offs in antenna development for compact wearable designs.
  • Solid understanding of carrier certification processes and regulatory compliance (FCC, CE, etc.) to ensure product readiness for global markets.
  • Hands-on experience measuring system performance parameters such as sensitivity, EVM, S-parameters, emissions, stability, and output power.
  • Proven experience working in highly creative, fast-paced, and collaborative teams alongside industrial designers, software engineers, and UX designers.
  • Ability to travel to factories to support builds.

Preferred Skills

  • Experience with Python and ADS for RF simulation and test automation.
  • Experience with schematic capture and circuit board layout design tools.
  • Knowledge of PCB design and efficiency in using Cadence tools (CIS, Allegro).
  • Ability to drive tasks independently and communicate issues/root-cause analysis clearly.
  • Strong presentation skills with experience engaging senior leadership.

Salary range: $140,000 - $225,000

Compensation & Benefits (Full-Time Employees)

The salary range for this role is listed above. Final salary offered is based upon multiple factors including individual job-related qualifications, education, experience, knowledge and skills.

At HP IQ, we offer a competitive and comprehensive benefits package, including:

  • Health insurance
  • Dental insurance
  • Vision insurance
  • Long term/short term disability insurance
  • Employee assistance program
  • Flexible spending account
  • Life insurance
  • Generous time off policies, including; 
    • 4-12 weeks fully paid parental leave based on tenure
    • 11 paid holidays
    • Additional flexible paid vacation and sick leave (US benefits overview)

Why HP IQ?

HP IQ is HP’s new AI innovation lab, building the intelligence to empower humanity—reimagining how we work, create, and connect to shape the future of work.

  • Innovative Work
    Help shape the future of intelligent computing and workplace transformation.
  • Autonomy and Agility
    Work with the speed and focus of a startup, backed by HP’s scale.
  • Meaningful Impact
    Build AI-powered solutions that help people and organisations thrive.
  • Flexible Work Environment
    Freedom and flexibility to do your best work.
  • Forward-Thinking Culture
    We learn fast, stay future-focused, and imagine what comes next—together.

Equal Opportunity Employer (EEO) Statement

HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).

Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.

If you’d like more information about HP’s EEO Policy or your EEO rights as an applicant under the law, please click here: Equal Employment Opportunity is the Law Equal Employment Opportunity is the Law – Supplement

Top Skills

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Cadence Tools
Cst
Hfss
Matlab
Python
Spectrum Analyzers
Vna
Xfdtd
HQ

HP IQ Palo Alto, California, USA Office

1501 Page Mill Road, Palo Alto, United States, 94304

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