PCIe/CXL Design Engineer (Principle)

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Our design team works on state-of-the-art datacenter and AI SOCs. As a member of the R&D team, you will design world-class hardware for the industry's largest customers.
This team hires some of the best engineers in the semiconductor industry and they have a direct impact on Marvell's growth. The customers served by this team are often other chip companies and big tech companies.

What You Can Expect

In this role, you will:

• Define the micro-architecture of PCIe/CXL subsystems for our customers.
• Work closely with the architecture, floor planning, backend, verification, DFT, STA teams, and other cross-functional teams to produce the highest quality hardware.
• Develop and write micro-architectural specifications of the design.
• Implement designs using good RTL coding and low power techniques.
• Collaborate with the backend team to close on synthesis, place and route, and timing signoff.
• Collaborate with the verification team on pre-silicon verification tasks such as reviewing test plans, coverage closure, and full-chip simulation debug.
• Plan, scope, and time tasks with the project manager.
• Work with post post-silicon group to resolve any lab issues and successfully bring up silicon.
• Collaborate with the software team to ensure customer use cases requirements are met.

What We're Looking For

Bachelor’s degree in computer science, Electrical Engineering, or related fields, and 15+ years of related professional experience. Or a Master’s degree in computer science, Electrical Engineering, or related fields with 12+ years of experience. Or a PhD in Computer Science, Electrical Engineering, or related fields with 10+ years of experience.
To be successful in this role, you will need to have the following skills:

• Expertise in PCIe/CXL architecture
• Expertise in micro architecture and translating requirements into design
• Expertise in interacting with 3rd party IP vendors and customers
• Expertise in System Verilog RTL coding techniques.
• Familiar with modern PCIe and SoC architectures and various interface technologies such as AXI, CXL, IDE, TDISP, ATS, LTSSM, VDM, and MSI-X.
• RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
• Experience in implementation/timing closure for high-speed design.
• Hands-on experience for all aspects of the chip-development process, with proficiency in front-end design tools and methodologies, is a plus.
• Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable.

Expected Base Pay Range (USD)

204,900 - 303,250, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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