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Intel

Senior Silicon Photonics Design Engineer

Posted 4 Days Ago
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In-Office
Santa Clara, CA, USA
142K-269K Annually
Senior level
In-Office
Santa Clara, CA, USA
142K-269K Annually
Senior level
Design, simulate, and optimize silicon photonic components (modulators, passive devices, detectors); perform tolerance and statistical analysis; lead test-chip design, layout, tapeout, testing and validation; develop modeling and test methodologies; analyze test data to close performance gaps; research next-generation photonic architectures; collaborate with cross-disciplinary teams to meet system-level requirements.
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Job Details:

Job Description: 

The Role and Impact
As a Senior Silicon Photonics Design Engineer, you will play a pivotal role in the simulation, design, and development of advanced photonic components for cutting-edge optical communication systems. Your daily work will involve designing, optimizing, and driving testing of silicon photonic integrated circuits (PICs) components, ensuring they meet performance, power, and reliability requirements. Leveraging your expertise in photonic fundamentals and device characterization, you will drive innovation that enables Intel's future data center growth. This role provides an exciting opportunity to impact next-generation photonics technologies and make meaningful contributions to Intel's leadership in the industry. Components include devices such as MMI's, AWG, Echelle gratings, interleavers, filters, gratings, CROW's on Si and SiN platforms, and active devices such as TWE/MRM modulators, heaters, PD's, and next generation material platforms.
Business Group
Intel's Integrated Photonics Solutions (IPS) is at the forefront of silicon photonics integration and commercialization, pioneering technologies that drive high-volume manufacturing and data center advancements. The team is dedicated to developing state-of-the-art photonic devices and systems, enabling smaller form factors, higher speeds, and innovative solutions for AI-driven bandwidth growth. By joining IPS, you will be part of a forward-thinking group committed to redefining the future of optical communications and datacenter technologies including Ai datacenter scaleup, laser sources, and pluggables/NPO/CPO/OCI PIC and beyond.
Key Responsibilities
- Design, simulate, and optimize photonic components such as modulators, passive devices, and detectors for silicon photonic integrated circuits.
- Perform tolerance analysis to ensure component reliability and performance under varying conditions.
- Lead test chip development, including design, layout, tapeout, testing, and validation.
- Analyze test data, identify performance gaps, and drive improvement strategies to optimize PIC component designs.
- Develop and implement modeling methodologies for photonic components and propose new test methodologies.
- Conduct research in next-generation photonic architectures and technologies to drive innovation and intellectual property development.
- Collaborate across diverse engineering disciplines to align designs with system-level requirements.

Qualifications:

Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Physics, Optical Science, or a related field with 4+ years of experience; Master's degree with 3+ years of experience; or Ph.D. with 1+ years of experience

Experience should include

- 4+ years Photonics device design and simulation.
- 4+ years Optical design and simulation tools such as Lumerical (FDTD, MODE, DEVICE, Interconnect), RSoft, or Tidy3D.
- 4+ years Hands-on experience in photonic integrated circuit design, from concept to high-volume manufacturing.
- 4+ years Photonic test methodologies and equipment, including optical spectrum analyzers, tunable lasers, and optical vector analyzers.
- 4+ years with layout tools such as Cadence and KLayout to support PIC tapeouts.
- 4+ years managing statistical analysis of photonic test data using tools like JMP or programming languages such as Python or Matlab.
Preferred Qualifications
- Exposure to advanced passive or active silicon photonic components such as ring modulators, MZIs, filters, or polarization splitters.
- Experience in inverse design methodologies and circuit-level simulations
- Experience in Ai workflows for advanced design
- Knowledge of system-level link modeling, Monte Carlo analysis, and optical coupling solutions.
- Understanding of advanced electronic ICs and integration with photonic systems, including drivers, TIAs, DSPs, and modulators.
- Strong communication skills to present designs and findings to cross-functional teams effectively.
Your expertise and creativity can help shape the future of optical communication systems and photonic integration. Take the next step in your career by joining Intel Integrated Photonics Solutions and contributing to technological breakthroughs that redefine industry standards.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, California, Santa Clara

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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