Altera (altera.com) Logo

Altera (altera.com)

Signal Integrity & Power Integrity Principal Engineer

Posted 25 Days Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
187K-270K Annually
Expert/Leader
In-Office
San Jose, CA, USA
187K-270K Annually
Expert/Leader
Lead design, verification, and optimization of high-speed interconnects. Develop simulation methodologies using EDA tools for electrical performance. Collaborate across design teams to meet performance goals.
The summary above was generated by AI
Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

We are seeking a highly experienced Signal Integrity & Power Integrity (SI/PI) Engineer with 15+ years of industry experience to lead the design, verification, and optimization of high‑speed interconnects across silicon, IC package, and board‑level architectures.

Key Responsibilities

  • Lead end‑to‑end signal and power integrity design for IC packages, validation platforms, and development kit hardware to achieve best‑in‑class electrical performance and reliability.

  • Define and deploy best‑in‑class SI/PI simulation methodologies, leveraging advanced EDA tools and AI‑assisted techniques to improve accuracy, efficiency, and product quality.

  • Perform detailed simulation, review, and trade‑off analysis of package and board designs to ensure scalable and robust electrical solutions.

  • Diagnose and resolve complex system‑level SI/PI challenges spanning electrical, mechanical, thermal, and manufacturing constraints.

  • Collaborate across silicon, package, and board design teams to define optimized electrical solutions that meet performance targets while minimizing product cost and maximizing customer competitiveness.

  • Drive forward‑looking SI/PI technologies, including advanced and heterogeneous packaging solutions, to support and influence future product architectures.

Salary Range

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance. 

$187,000 - $270,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

#MD-1

Qualifications:

Minimum Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with a strong foundation in electromagnetics, circuit analysis, and signal processing.

  • 15+ years of hands‑on experience in Signal Integrity and Power Integrity engineering across silicon, package, and board‑level designs.

  • Deep expertise in high‑speed digital interfaces, SI/PI fundamentals, and power delivery network behavior.

  • Proficiency with industry‑standard simulation and modeling tools such as ANSYS HFSS, Synopsys HSPICE, Cadence Sigrity, Keysight ADS, or equivalent platforms.

  • Strong analytical skills to interpret, correlate, and validate simulation, design, and measurement data.

  • Proven ability to solve complex, multi‑domain SI/PI problems with a structured and methodical approach.

  • Hands‑on experience with silicon/package/board layout and design tools (e.g., Mentor Graphics, Cadence Allegro).

  • Scripting and automation experience using Python, MATLAB, or similar languages is highly desirable.

Preferred Qualifications

  • Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field, with a strong foundation in electromagnetics, circuit analysis, and signal processing.

Job Type: Regular

Shift:Shift 1 (United States of America)

Primary Location:San Jose, California, United States

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
HQ

Altera (altera.com) San Jose, California, USA Office

101 Innovation Dr, San Jose, California, United States, 95134

Similar Jobs

8 Days Ago
In-Office
Santa Clara, CA, USA
178K-266K Annually
Senior level
178K-266K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Lead technical authority for Signal Integrity and Power Integrity, ensuring performance of customer platforms using Marvell silicon from prototype through production, involving simulation, testing, and guideline definition.
Top Skills: BertsCadence Sigrity)Eda Tools (Ansys HfssHigh-Speed NetworkingOscilloscopesPower IntegritySignal IntegrityTdrVnas
10 Days Ago
In-Office
San Jose, CA, USA
113K-211K Annually
Senior level
113K-211K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The engineer analyzes customer environments and develops solutions for signal and power integrity issues, leading technical projects and ensuring customer success with minimal supervision.
Top Skills: Cadence AllegroCelsiusClarityElectromagneticsIc PackagePcb EditorPower IntegrityRfSignal IntegritySigrityThermal
3 Days Ago
In-Office
San Jose, CA, USA
203K-250K Annually
Senior level
203K-250K Annually
Senior level
Big Data • Information Technology
Lead SI/PI planning, design, simulation, and lab validation for high-speed connectivity products. Perform EM and PI simulations, hardware constraint definition, debug root-cause issues, and collaborate cross-functionally to deliver PCIe/Ethernet/SERDES channel solutions.
Top Skills: AdsAnsysBgaCadenceCosmosCxlEthernet 224GEthernet 448GNvlinkOscilloscopePcbPcieSerdesTdrUalinkVna

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account