SOC/ASIC Physical Design Engineer (Silicon Engineering)

SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)

RESPONSIBILITIES:

• Perform partition synthesis and physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
• Develop/improve physical design methodologies and automation scripts for various implementation steps
• Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs
• Resolve design/timing/congestion and flow issues, identify potential solutions and drive execution
• Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical verification, electromigration and voltage drop

BASIC QUALIFICATIONS:

• Bachelor’s degree in electrical engineering, computer engineering or computer science
• 2+ years of professional experience working with ASICs and/or physical design flow development

PREFERRED SKILLS AND EXPERIENCE:

• Basic experience of ASIC/SOCs RTL2GDSII physical design and signoff flows
• Basic experience with industry standard EDA tools including understanding of their capabilities and underlying algorithms
• Knowledge of deep sub-micron FinFET and CMOS solid state physics
• Understanding of CMOS digital design principles, basic standard cells their functionality, standard cell libraries
• Understanding of CMOS power dissipation in deep submicron processes leakage/dynamic
• Familiar with CMOS analog circuit and physical design
• Basic knowledge of DFT/Scan/MBIST/LBIST and understanding of their impact on physical design flows
• Good scripting skills (csh/bash, Perl, Python, TCL, Makefile etc.)
• Self-driven individual with a can-do attitude, willing to learn, and an ability to work in a dynamic group environment

ADDITIONAL REQUIREMENTS:

• Must be willing to work extended hours and weekends as needed

COMPENSATION AND BENEFITS:

Pay range:    
Physical Design Engineer/Level I: $130,000.00 - $155,000.00/per year    
Physical Design Engineer/Level II: $150,000.00 - $180,000.00/per year    
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.