Design and verify digital image sensor and SoC systems, including RTL, IP integration, ISP datapaths, high-speed interfaces, ASIC implementation, and full-chip validation. Perform simulation, synthesis, formal verification, timing analysis, DFT, FPGA prototyping, chip bring-up, silicon debugging, and performance tuning. Develop verification environments using SystemVerilog, SVA, Python, and Perl while collaborating across hardware, software, sensor, analog, and algorithm teams.
Job Title: SoC Design Engineer
Job Duties:
Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image sensor control and processing functions, as well as high-speed interfaces such as USB and MIPI. Perform full-chip integration, verification, and system-level validation following standard ASIC design flows. Work closely with back-end teams on floorplanning, timing closure, static timing analysis (STA), and design-for-test (DFT). Design and integrate ISP data paths according to PRD/design specifications and overall SoC architecture. Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification, and DFT using industry-standard EDA tools such as Synopsys PrimeTime, Cadence Virtuoso, Design Compiler, and Integrator. Conduct chip bring-up, silicon validation, debugging, and performance tuning. Participate in FPGA prototyping and validation activities. Develop verification environments and models using SystemVerilog, SVA, Python, and Perl, and support hardware/software co-simulation. Collaborate with sensor, analog, algorithm, and application engineers on system design, module-level architecture, RTL implementation, micro-architecture design, image tuning, and product qualification. Prepare and maintain architecture, register, interface, and design documentation throughout the development lifecycle.
Requirements:
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields.
Require one year experience in Digital Design.
Experience shall include:
- Wi-Fi PHY baseband RTL design and verification.
- Digital signal processing module implementation using Verilog.
- Module-level verification and full-chip integration support.
- Design optimization techniques for area, power, and timing.
- Using industry-standard digital design and verification tools.
- Reading schematics and data sheets for software driver development on the SoC.
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.
OMNIVISION Santa Clara, California, USA Office
4275 Burton Dr, Santa Clara, California, United States, 95054 1512
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