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Intel

Sr Director, XSE Design Verification Engineering Manager

Posted Yesterday
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In-Office
Santa Clara, CA, USA
256K-361K Annually
Senior level
In-Office
Santa Clara, CA, USA
256K-361K Annually
Senior level
Leads a team of design verification engineers responsible for Xeon SoC verification, verification processes, tools, regression metrics, and quality delivery. Partners with design, microarchitecture, post-silicon validation, program, and security teams to identify bugs, improve coverage, and meet milestones. Presents verification status to executives, drives execution and accountability, develops technical leaders, and manages cross-functional engineering results.
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Job Details:

Job Description: The Role and Impact As a Design Verification Engineering Manager, you will lead a dynamic team of design verification engineers responsible for Xeon SoC design verification. You will deploys and manage leading silicon design verification processes, procedures, verification tools, and technologies based on latest best industry practices. You will work with design, microarchitecture, and post-silicon validation teams to identify design bugs and improve overall microarchitecture. You will also bring a culture of rapid execution with high quality and simplify complicated process flows. This critical role ensures delivery excellence, directly contributing to Intel's broader success in creating innovative technology solutions. Business group The Data Center Group (DCG) is at the forefront of Intel's mission to deliver advanced technologies that power cloud computing, enterprise, AI, and edge solutions. Within DCG, the DSE Xeon SoC Engineering organization specializes in developing cutting-edge SoC designs to drive next-generation data center performance. Joining this team means being part of a collaborative environment dedicated to shaping the future of data-driven innovation. Key Responsibilities - Present status of Verification and quality of design to senior executives in clear and concise manner and present solutions when design hits critical issues. - Collaborates with program leaders on the verification delivery and regression metrics against milestone requirements. Understands security milestone expectations and works with SoC security validation teams to incorporate security-related testing through validation, hackathon reviews, and new validation techniques to improve security coverage. Executes security and security development lifecycle tasks per job role and schedule milestones. - Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results. - Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment. Create future technical leaders who imbibe the rapid execution and can-do attitude.

Qualifications:Minimum Qualifications - Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or a related field. - 12+ years of experience in ASIC/SoC design and verification with a Bachelor's degree, 8+ years with a Master's degree, or 6+ years with a PhD. - Comprehensive knowledge of industry-standard protocols. Preferred Qualifications - Proven experience in formal people management or leadership roles, with 5-10+ years in managing technical teams. - Familiarity with AI and GPU technologies. - Experience with hardware emulation platforms. - Strong interpersonal and communication skills to effectively lead cross-functional teams and drive results. We invite you to bring your leadership, technical expertise, and passion for innovation to Intel, where you'll have the opportunity to make a meaningful impact on groundbreaking technologies.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, California, Santa Clara

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $256,050.00-361,480.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Mountain View, United States

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