Marvell Technology Logo

Marvell Technology

Staff Engineer, Application Engineering

Reposted 5 Days Ago
Be an Early Applicant
In-Office
Santa Clara, CA
111K-166K Annually
Mid level
In-Office
Santa Clara, CA
111K-166K Annually
Mid level
Provide customer-facing technical support and integration guidance for SerDes IP; lead DSP and mixed-signal design optimization and troubleshooting; create validation tests, documentation, and training; collaborate cross-functionally to ensure product performance and compliance with Ethernet/PCIe standards.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

CE CSE AE team is responsible of supporting all Marvell business units and customer if needed, specifically in PHY electrical and systematic issue debug.

What You Can Expect

  • Customer Engagement: Work closely with customers to understand their technical requirements and provide expert guidance on the integration of Marvell's SerDes IP into their systems.
  • Technical Support: Provide hands-on technical support during the design, development, and deployment phases, ensuring successful implementation of SerDes IP solutions.
  • Design Optimization: Collaborate with internal design teams to optimize SerDes IP performance, focusing on DSP algorithms and mixed-signal circuit components to meet stringent performance and reliability standards.
  • Problem Solving: Lead troubleshooting efforts for complex technical issues related to SerDes IP, leveraging deep expertise in both DSP algorithms and mixed-signal design.
  • Documentation & Training: Create and maintain comprehensive technical documentation and conduct training sessions for customers and internal teams on SerDes IP features and best practices.
  • Cross-Functional Collaboration: Work with cross-functional teams, including product management, design engineering, and quality assurance, to ensure alignment of product capabilities with customer needs.
  • Customer Engagement: Work closely with customers to understand their technical requirements and provide expert guidance on the integration of Marvell's SerDes IP into their systems.
  • Technical Support: Provide hands-on technical support during the design, development, and deployment phases, ensuring successful implementation of SerDes IP solutions.
  • Design Optimization: Collaborate with internal design teams to optimize SerDes IP performance, focusing on DSP algorithms and mixed-signal circuit components to meet stringent performance and reliability standards.
  • Problem Solving: Lead troubleshooting efforts for complex technical issues related to SerDes IP, leveraging deep expertise in both DSP algorithms and mixed-signal design.
  • Documentation & Training: Create and maintain comprehensive technical documentation and conduct training sessions for customers and internal teams on SerDes IP features and best practices.
  • Cross-Functional Collaboration: Work with cross-functional teams, including product management, design engineering, and quality assurance, to ensure alignment of product capabilities with customer needs.

What We're Looking For

  • Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. Ph.D. is a plus.
  • Experience: 3+ years of relevant experience in SerDes IP, DSP algorithm development, and mixed-signal circuit design.
  • Technical Skills:
    • Strong expertise in SerDes IP and high-speed serial communication protocols (e.g., PCIe, Ethernet).
    • Proficient in DSP algorithm design and implementation, including equalization, filtering, and error correction.
    • Extensive experience with mixed-signal circuit design, including PLLs, ADCs, DACs, and high-speed analog front-ends.
    • Familiarity with EDA tools for mixed-signal design and verification (e.g., Cadence, Synopsys).
    • Experience with lab equipment for signal integrity analysis and debugging (e.g., oscilloscopes, spectrum analyzers).
    • Experience in creating and performing validation test cases/scripts and generating reports.
    • Expertise in Ethernet and PCIe protocol system design and application. Proficient in Ethernet and PCIe electrical compliance test measurements.
  • Soft Skills:
    • Excellent problem-solving skills with a proactive and hands-on approach.
    • Strong communication and interpersonal skills, with the ability to convey complex technical concepts to diverse audiences.
    • Ability to work effectively in a fast-paced, collaborative environment.

Expected Base Pay Range (USD)

111,070 - 166,400, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-AR3

Top Skills

Serdes,Dsp,Pcie,Ethernet,Cadence,Synopsys,Oscilloscope,Spectrum Analyzer,Plls,Adc,Dac,Signal Integrity
HQ

Marvell Technology Santa Clara, California, USA Office

5488 Marvell Ln, Santa Clara, CA, United States, 95054

Similar Jobs

30 Minutes Ago
In-Office or Remote
8 Locations
126K-223K Annually
Mid level
126K-223K Annually
Mid level
Blockchain • eCommerce • Fintech • Payments • Software • Financial Services • Cryptocurrency
The Strategy and Planning Manager will support strategic planning, operational processes, and partnerships across teams to drive decision-making and efficiency.
Top Skills: Ai ToolsExcelSQL
30 Minutes Ago
In-Office or Remote
8 Locations
185K-327K Annually
Senior level
185K-327K Annually
Senior level
Blockchain • eCommerce • Fintech • Payments • Software • Financial Services • Cryptocurrency
The Software Engineer will build and improve mobile experiences for Square's connected hardware products, working on reliable systems and integrations across various technologies.
Top Skills: BleJavaKotlinUsb
30 Minutes Ago
In-Office or Remote
8 Locations
39-51 Hourly
Internship
39-51 Hourly
Internship
Blockchain • eCommerce • Fintech • Payments • Software • Financial Services • Cryptocurrency
As an Intern, you will contribute to the development, testing, and debugging of embedded software for Square's Connected Hardware products, gaining hands-on experience with real-world systems and working alongside experienced engineers.
Top Skills: CC++I2CMicrocontrollersRtosSpiUartUsb

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account