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Tacit

System Electrical Engineer

Posted 20 Days Ago
Be an Early Applicant
In-Office
San Francisco, CA, USA
180K-220K Annually
Mid level
In-Office
San Francisco, CA, USA
180K-220K Annually
Mid level
Validate, debug, and improve electrical systems for next-generation sensing hardware from prototype through production. Responsibilities include board bring-up, analog, digital, power, and mixed-signal characterization; root-causing hardware issues; schematic and PCB updates; automated bench testing; reliability, yield, and statistical analysis; and collaboration with firmware, software, mechanical teams, and contract manufacturers.
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About Tacit

We are an early-stage, deep tech startup based in San Francisco, developing innovative hardware that rethinks human-computer interaction. We are backed by General Catalyst, Khosla Ventures, and Greylock Partners, with a founding team from Stanford, BrainGate, Oculus, and Tesla. While we can’t reveal too much just yet, our team is tackling cutting-edge engineering challenges to bring revolutionary products to life.

About the role

We're looking for a System Electrical Engineer to validate, debug, and improve the core electrical blocks of our next-generation sensing hardware. You'll sit between design and validation: you'll bring up prototypes on the bench, find out how each architectural block really performs, root-cause what doesn't, and feed those findings back into the next schematic and layout.

Your work spans the product from prototype to mass production: bring-up, design updates, and test implementation. The goal of each design cycle is better performance, lower power, and smaller area. As our products move toward production, there is room to grow into supporting builds with our contract manufacturers.


What you'll do
  • Bench validation and characterization

    • Bring up prototype boards and get them to a stable, measurable state.

    • Write and run validation plans for architectural blocks: power rails, battery charging and power management, high-speed interfaces, sensor front ends, and mixed-signal paths.

    • Characterize blocks across voltage, load, temperature, and operating modes, and compare results against design intent.

  • Debug and root cause

    • Run systematic debug across analog, digital, and power domains using oscilloscopes, logic and protocol analyzers, spectrum analyzers, power supplies, electronic loads, and current probes.

    • Root-cause issues such as rail noise and ripple, signal integrity problems, noise coupling into sensitive analog paths, unexpected resets, and excess power draw.

    • Separate real failures from measurement artifacts, and back conclusions with data.

  • Design improvement for performance, power, and area

    • Turn validation findings into concrete schematic and layout changes for the next prototype cycle.

    • Own schematic and PCB updates for the blocks you validate, working with the senior hardware team on architecture and component choices.

    • Find savings in power consumption, quiescent current, board area, and component count without losing performance.

  • Test implementation, yield, and reliability

    • Build repeatable bench test setups and automate measurements where it speeds up learning.

    • Use statistics across units and builds to set limits, spot outliers, and track yield.

    • Run reliability and stress testing, and feed failure findings back into the design. Over time, help turn bench tests into production tests and support builds with contract manufacturers.

  • Cross-functional work

    • Work closely with mechanical, firmware, and software engineers on bring-up, debug, and design trade-offs.

    • Write clear validation reports and debug summaries that drive design decisions.

       
Requirements
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

  • 3+ years of experience in electrical engineering, hardware design, or hardware validation.

  • Strong EE fundamentals: analog and mixed-signal circuits, power conversion and regulation, signal integrity, power integrity, and grounding.

  • Strong hands-on debug skills, with a track record of root-causing hardware issues on real boards.

  • Hands-on experience with board bring-up and lab instruments such as oscilloscopes, logic analyzers, power supplies, electronic loads, and probes.

  • Experience with schematic capture and PCB design for multi-layer boards, in Altium Designer or an equivalent tool.

  • Working knowledge of high-speed interfaces such as USB, Quad-SPI, MIPI, or DDR, and low-speed buses such as I2C, SPI, and UART.

  • Experience with power and battery systems: DC-DC converters, LDOs, PMICs, and Li ion/Li-poly charging.

  • Ability to write clear validation plans and reports.

  • Comfortable working in a fast-moving startup where engineers own large parts of the hardware.

Strong candidates may have
  • Python or similar scripting for lab automation and instrument control (PyVISA, SCPI).

  • Embedded firmware experience in C/C++, enough to add test hooks and diagnostics.

  • Background in signal integrity and power integrity simulation, using tools such as HyperLynx, Ansys SIwave, or Cadence Sigrity.

  • Familiarity with RF circuits and components.

  • Experience with wearable, body-worn, or battery-powered devices with tight power, size, and thermal limits.

  • Experience with low-noise analog front ends, biopotential sensing, or other sensitive sensor interfaces.

  • Statistical analysis of test data across units and builds, such as yield, limits, and outlier detection.

  • Production test exposure: test fixtures, boundary scan/JTAG, ICT, or calibration flows. Experience supporting EVT, DVT, or PVT builds with contract manufacturers.

  • Familiarity with EMI/EMC pre-compliance testing and reliability or environmental testing.

Success in this role looks like
  • Each prototype is brought up quickly, and its key blocks are measured and understood.

  • Hardware issues are caught early and root-caused with data, not guesswork.

  • Each design cycle shows measurable gains in performance, power, or board area.

  • Validation plans cover the real technical risks, and bench results match how the product behaves in use.

  • Bench tests become repeatable and automated, ready to carry into production test as builds ramp.

     
Benefits
  • Competitive equity package

  • Comprehensive medical, dental, and vision insurance

  • Company size: 40-60 people

  • Unlimited PTO

  • Visa sponsorship

  • 4% 401k matching

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