Yield Manager

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

We are seeking a Yield Manager within Silicon Operations to own manufacturing yield performance across Etched's silicon production lifecycle, from wafer fabrication through advanced packaging (CoWoS) and final test. This role will ensure manufacturing readiness, monitor production health, and lead yield improvement as new ASIC products move from engineering builds into high-volume manufacturing.

You will serve as the operational focal point for silicon yield, working directly with foundry and OSAT partners and across ASIC design, product, test, DFT, package, failure analysis, quality, reliability, program management, and manufacturing operations. You will coordinate rapid containment and root-cause resolution, reduce production risk, and maximize the output of good dies and good packaged parts.

Key Responsibilities

• Own daily monitoring of wafer, CoWoS assembly, and final test yield across NPI, production ramp, and high-volume manufacturing.

• Define, track, and communicate silicon manufacturing KPIs, including wafer yield, package yield, final test yield, yield ramp velocity, cycle-time impact, excursion response time, and corrective-action closure.

• Identify yield excursions and emerging production risks; coordinate containment, material

• disposition, recovery, and executive escalation as required.

• Analyze wafer maps, parametric data, sort and final test results, assembly yield, and manufacturing data to isolate yield-loss mechanisms and improvement opportunities.

• Lead cross-functional yield reviews with foundry, OSAT, product engineering, test engineering,

• package engineering, failure analysis, and quality teams.

• Prioritize yield issues based on output impact, supply commitments, schedule, cost, and business priorities; drive corrective actions through verified closure.

• Serve as the primary operational interface with foundry, CoWoS, and test partners for yield

• performance, excursion response, and improvement planning.

• Monitor wafer fabrication, advanced packaging, and test execution against production targets and partner commitments.

• Support manufacturing readiness for new ASIC products, process nodes, and packaging

• technologies; establish yield tracking for engineering builds and production ramps.

• Identify risks to production readiness, schedule, capacity, cost, and quality, and coordinate mitigation plans across internal and external teams.

• Develop and maintain automated yield dashboards, production reports, and early-warning indicators that enable timely operational decisions.

• Standardize yield review cadence, reporting methods, operating procedures, and manufacturing workflows across the silicon lifecycle.

• Measure the effectiveness of yield improvement initiatives and partner performance; drive continuous improvement in output, response time, data accuracy, and production visibility.

You may be a good fit if you have (Must-have qualifications)

• 7+ years of experience in semiconductor yield engineering, product engineering, manufacturing engineering, or silicon operations, including ownership of yield during production ramp or high-volume manufacturing.

• Deep understanding of semiconductor manufacturing from wafer fabrication through wafer sort, advanced packaging, and final test.

• Hands-on experience managing yield performance with leading-edge foundry and OSAT partners; experience with 2.5D/3D integration or CoWoS is strongly preferred.

• Demonstrated success detecting, containing, and resolving complex yield excursions while protecting production output and customer commitments.

• Strong command of statistical yield analysis and manufacturing methods, including SPC, pareto analysis, hypothesis testing, DOE, process capability, and root-cause analysis.

• Experience analyzing wafer maps, parametric data, test data, bin distributions, assembly data, and equipment or process history to identify systematic yield loss.

• Ability to translate detailed technical findings into clear priorities, risk assessments, recovery plans, and operating decisions for technical and executive audiences.

• Experience building automated manufacturing reports and dashboards; proficiency with SQL and a scripting or analytics language such as Python is strongly preferred.

• Track record of influencing cross-functional teams and external manufacturing partners in a fast-paced, schedule-driven production environment.

• Strong technical documentation and operational discipline, including excursion reports, corrective-action tracking, operating procedures, and KPI definitions.

• Bachelor's degree in Electrical Engineering, Materials Science, Chemical Engineering, Physics, Mechanical Engineering, or a related technical field; an advanced degree is a plus.

• Ability to travel to foundry, packaging, and test partner sites as business needs require.

Benefits

• Medical, dental, and vision packages with generous premium coverage

  • $500 per month credit for waiving medical benefits

• Housing subsidy of $2k per month for those living within walking distance of the office

• Relocation support for those moving to San Jose (Santana Row)

• Various wellness benefits covering fitness, mental health, and more

• Daily lunch and dinner in our office

• Unlimited compute budget subject to ROI justification

How we're different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.