Jobs at Cerebras Systems

The Senior Technical Program Manager is responsible for site and data center operations, leading cross-functional programs, ensuring operational readiness, and managing metrics and KPIs for AI infrastructure.

The Manufacturing Bring-up Engineer oversees system testing and validation, collaborating with cross-functional teams to automate workflows and enhance manufacturing efficiencies.

Support system-level bring-up processes in manufacturing, collaborate on automation and validate system performance, resolve technical issues and track metrics for continuous improvement.

Responsible for software integration and quality for Cerebras AI platform, focusing on automation, debugging, and cross-team collaboration. Develops QA strategies and testing methodologies to ensure product quality.

Design and develop high-performance distributed software for scalable AI training systems, focusing on data pipelines and system efficiency.

Develop and automate configuration for distributed clusters, create monitoring tools, manage cloud operations, and ensure system reliability for Cerebras AI supercomputers.

Lead a team to improve the reliability of advanced compute clusters and manage failure analysis and debugging processes.

As a new engineer at Cerebras, you'll learn their platforms, focusing on programming the Wafer Scale Engine, kernel development, and system performance modeling.

Lead brand expression and integrated go-to-market programs, unifying creative, product, growth, and communications to deliver cohesive campaigns that drive awareness, engagement, and measurable pipeline growth while building and managing an in-house creative and agency ecosystem.

Lead technical product marketing for AI compute, owning positioning, competitive strategy, and technical content. Translate systems-level innovations into customer and executive narratives, drive competitive intelligence, support launches, and lead a technical product marketing team aligned with product, engineering, and sales.

As an Engineering Manager for Inference ML Runtime, you will lead a team to design, scale, and optimize AI inference systems on Cerebras hardware, ensuring high performance and overseeing execution of ML engineering initiatives.

The Senior Cost Accounting Manager will oversee cost accounting processes, inventory management, and collaborate cross-functionally to ensure accurate financial reporting. This role requires analytical skills and experience in manufacturing settings.

Design, build, and maintain a full-stack manufacturing test platform: develop test frameworks, intuitive UIs, distributed data storage to sync test data across facilities, and interactive reports. Collaborate with hardware, data, operations, and reliability teams to improve manufacturing efficiency, quality, and scalability across the product lifecycle.

The Senior Hardware Technical Program Manager will lead program schedules for engineering improvements, collaborating across teams for hardware integration and deployment in AI supercomputers.

The role involves synthesizing, placing, and routing high-speed designs, collaborating with RTL teams, and optimizing designs for power/performance area.

The Senior Performance Analyst will benchmark Cerebras' AI inference performance, analyze competitor pricing, and provide pricing recommendations to enhance the customer value proposition, requiring deep expertise in ML frameworks and architecture.

As a Network Architect, you'll design AI/ML and HPC clusters, address performance bottlenecks, drive multi-team projects, and collaborate with vendors.

The Forward Deployed Product Manager at Cerebras leads customer engagements, co-architects AI solutions, and influences product roadmaps to enhance AI applications in various industries.

Lead the design and development of high-performance RTL solutions for the Cerebras Wafer Scale Engine, collaborating with teams and managing ASIC vendors.

Design, implement, optimize, and validate high-performance ML and linear algebra kernels for Cerebras hardware. Develop low-level assembly and CSL routines, measure and tune performance, build testing methodologies, and collaborate with chip and system architects to maximize compute utilization for AI and HPC workloads.