Broadcom Logo

Broadcom

IC Design Engineer

Reposted 10 Days Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
108K-192K Annually
Senior level
In-Office
San Jose, CA, USA
108K-192K Annually
Senior level
The IC Design Engineer designs and develops integrated circuits, oversees ASIC development, defines architecture, and evaluates processes. Responsibilities include leading product delivery and mentoring junior team members.
The summary above was generated by AI

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.

Job Description:

  • Layout design of digital high-performance blocks

  • Timing closure of the blocks with best PPA (power/performance/area)

  • Debug LVS/DRC/ERC errors with verification tool

  • Analyze the trade-offs and performance implications of different cell architectures

  • Collaborate with design and layout engineers to optimize layout for area and performance

  • Work with CAD, packaging and foundry teams in resolving layout and / or verification issues
     

Ideal Candidate Will Have:

  • Strong understanding of physical implementation.

  • Experience working with advanced semiconductor technologies.

  • Experience in implementing low power and high-performance cores

  • Excellent communication and cross-functional collaboration skills.

  • Ability to analyze complex trade-offs and make data-driven decisions.

  • 5-10 years of hands-on experience with Place and route tools

  • Bachelors and 5+ years of related experience;  Master’s or PhD in Engineering is a plus


Compensation and Benefits


The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

HQ

Broadcom Palo Alto, California, USA Office

Palo Alto, CA, United States

Broadcom Richmond, California, USA Office

13711 International Pl Unit 200, Richmond, British Columbia, V6V 2Z8, Canada, Richmond, Canada, V6V 2Z8

Broadcom San Francisco, California, USA Office

San Francisco, United States, 0

Broadcom San Jose, California, USA Office

1320 Ridder Park Drive, San Jose, CA, United States, 95131

Broadcom Santa Clara, California, USA Office

Santa Clara, United States, 0

Broadcom Sunnyvale, California, USA Office

190 Mathilda Pl, Sunnyvale, California, 94086-6076, United States, Sunnyvale, United States, 94086-6076

Similar Jobs

2 Days Ago
In-Office or Remote
7 Locations
230K-323K Annually
Senior level
230K-323K Annually
Senior level
Aerospace
Designs, simulates, characterizes, and validates custom mixed-signal and digital interface circuits. Develops Liberty timing models across PVT, slew, load, and parasitic conditions; performs SPICE-based waveform analysis; automates characterization flows; and integrates models with synthesis, implementation, STA, signoff, and verification workflows. Collaborates with analog, digital, physical design, and verification teams while documenting methodologies and mentoring junior engineers.
Top Skills: Ade AssemblerAde ExplorerCadence LiberateCadence VirtuosoCmosDspfEldoExtracted-Netlist SimulationFastspiceFinesimFusion CompilerHspiceInnovusLiberty .LibMonte Carlo AnalysisPerlPrimetimePvt AnalysisPythonShellSkillSolido Characterization SuiteSpectreSpefSpiceStatic Timing AnalysisSynopsys SiliconsmartSystemverilogTclTempusTransistor-Level SimulationVerilogVerilog-AXa
4 Days Ago
In-Office
San Jose, CA, USA
161K-299K Annually
Senior level
161K-299K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Leads customer-facing pre-sales and post-sales support for Cadence digital IC implementation and signoff products. Provides expertise in synthesis, place and route, design closure, timing and power signoff, STA, and SDC debugging. Conducts presentations, demonstrations, benchmarks, and technical evaluations; improves implementation flows using Tcl, Perl, and shell scripting; collaborates with R&D; supports business cases; and mentors junior engineers.
Top Skills: AsicCadenceDesign CompilerEdaFusion CompilerGenusIcc2InnovusPerlRtl CompilerSdcShell ScriptingStatic Timing AnalysisTcl
5 Days Ago
In-Office
Santa Clara, CA, USA
Entry level
Entry level
Hardware • Semiconductor • Manufacturing
Designs high-speed mixed-signal communication circuits and digital circuits interfacing with analog components. Responsibilities include RTL coding, simulation, synthesis, timing closure, verification, evaluation, debugging, test-method development, technical documentation, and demo-board support. Collaborates with analog and digital design teams to solve complex problems and deliver semiconductor projects on schedule.
Top Skills: Analog Ic DesignCircuit VerificationDigital Logic DesignMixed-Signal Ic DesignRtlSimulationSynthesisSystemverilogTiming ClosureVerilog

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account