Lead verification for complex SoC/ASIC designs: develop and maintain SystemVerilog/UVM environments, create test plans and tests, drive coverage closure, debug failures, build automation with Python/Perl, support boot code and multi-core validation, and mentor verification engineers to achieve successful tape-outs.
Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. We leverage cutting-edge technologies to create scalable, secure, and user-friendly applications.
As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology.
This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential.
Job Title: Principal Design Verification Engineer
Location: Santa Clara, CA (Onsite)
Salary: $158,600 - $317,800
Bonus + RSUsJob Summary
We are seeking an experienced Principal Design Verification Engineer to lead verification activities for complex SoC/ASIC designs. The ideal candidate will have strong expertise in SystemVerilog, UVM, and functional verification, along with a proven track record of successful SoC tape-outs.Responsibilities
Visa Sponsorship Available
Would you like to know more about this opportunity? For immediate consideration, please send your resume to [email protected] or contact us at (908) 650-6382
Bright Vision Technologies, we are committed to equal employment opportunities and fostering an inclusive work environment. If you require accommodations during the recruitment process, please let us know.
Position offered by “No Fee agency.”
As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology.
This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential.
Job Title: Principal Design Verification Engineer
Location: Santa Clara, CA (Onsite)
Salary: $158,600 - $317,800
Bonus + RSUsJob Summary
We are seeking an experienced Principal Design Verification Engineer to lead verification activities for complex SoC/ASIC designs. The ideal candidate will have strong expertise in SystemVerilog, UVM, and functional verification, along with a proven track record of successful SoC tape-outs.Responsibilities
- Lead Design Verification efforts for complex SoC projects.
- Develop and maintain verification environments using SystemVerilog and UVM.
- Create verification test plans, develop tests, and drive coverage closure.
- Debug verification failures and work closely with design teams.
- Develop automation tools using Python or Perl.
- Support boot code verification and multi-core SoC validation.
- Mentor and lead verification engineers.
10+ years of Design Verification experience (or MS/PhD with 5+ years).
Strong experience with SystemVerilog and UVM.
Experience with SoC/ASIC verification and successful tape-outs.
Expertise in constrained-random and coverage-driven verification.
Python or Perl scripting experience.
Experience with EDA verification tools.
Strong Linux, C++, and Object-Oriented Programming skills.
ARM Assembly experience preferred.
- BS/MS/PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field
Visa Sponsorship Available
Would you like to know more about this opportunity? For immediate consideration, please send your resume to [email protected] or contact us at (908) 650-6382
Bright Vision Technologies, we are committed to equal employment opportunities and fostering an inclusive work environment. If you require accommodations during the recruitment process, please let us know.
Position offered by “No Fee agency.”
Similar Jobs
Aerospace
Lead verification of modem PHY IP: define strategies, build block/subsystem verification environments, create testbenches and coverage, correlate RTL with reference models, debug RTL and integration issues, support emulation/FPGA/prototyping and post-silicon debug, and drive regression automation and CI for high-throughput wireless ASIC platforms.
Top Skills:
AssertionsCC++CdcEmulationFormalFpgaLintLow-Power VerificationMatlabPerlPythonRdcRtlShellSystemverilogUvm
12 Days Ago
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Lead design verification for FPGA/ASIC signal-processing and control systems: plan and build SystemVerilog/UVM/OVM/VHDL self-checking, constrained-random testbenches; develop test plans; collect/analyze coverage; create reusable VIP; lead and mentor DV teams; drive process improvements and execute schedules.
Top Skills:
AsicBitbucketC++CadenceFpgaGitJavaJIRAMatlabMentor QuestaOvmPerlPythonSimulinkSystemverilogUvmVhdl
Software • Quantum Computing • Metaverse • Infrastructure as a Service (IaaS)
Lead creation of complex pre-silicon and post-silicon verification environments and tests for AI accelerators. Define verification plans, develop testbenches (SystemVerilog/UVM), debug simulation/emulation, implement coverage and scoreboards, and build scalable verification tooling and scripts while collaborating across hardware, firmware, and architecture teams.
Top Skills:
CC++EmulationFpgaHardware EmulationMakefilesPerlPythonRubySimulationSystemverilogUvmVerilogVhdl
What you need to know about the San Francisco Tech Scene
San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.
Key Facts About San Francisco Tech
- Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
- Major Tech Employers: Google, Apple, Salesforce, Meta
- Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
- Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
- Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
- Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine
