Broadcom Logo

Broadcom

R&D Engineer IC Design

Reposted 16 Hours Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
120K-192K Annually
Senior level
In-Office
San Jose, CA, USA
120K-192K Annually
Senior level
Design interposer layouts for high-speed interfaces while collaborating with cross-functional teams. Requires scripting for automation and expertise in 2.5D/3D designs.
The summary above was generated by AI

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

We are part of the core switching group (CSG) at Broadcom developing industry leading network switches for enterprise and mega scale data centers . We are looking for experienced engineers to design cutting edge CoWos 2.5D , 3D interposer designs.   You will be working on designing interposers starting with custom routing for high speed interfaces, bump map design ,  routing and physical verification and tapeout to the foundries.  As part of your job you will be interacting with packaging , signal integrity and foundries to meet the packaging, SI and physical requirements of the interposers. Experience with interposer designs including CoWoS, 2.5D/3D integration using Cadence Innovus/Integrity or Synopsys 3DIC compiler is a must. Candidates should have a strong understanding of TSV design, micro-bumps, solder bumps, and interconnect technologies. Strong automation expertise related to bump pattern generation , routing structure development for high speed interfaces, and chip finishing are required to handle multiple Interposer designs in parallel. Basic understanding of routing structure impact on high-speed signal integrity (SI), power integrity (PI), and thermal analysis is required.
 

Technical Skills & Experience:

  • Experience with interposer and advanced packaging design, including CoWoS, 2.5D/3D

  • Proficiency with EDA tools such as Cadence (Innovus, Integrity), Synopsys (3DIC compiler), Mentor Graphics (Calibre) for layout generation, editing and verification

  • Strong understanding of TSV design, micro-bumps, solder bumps, and interconnect technologies.

  • Basic understanding of high-speed signal integrity (SI), power integrity (PI), and thermal analysis.

  • Familiarity with semiconductor fabrication processes, particularly for silicon interposers.

  • Strong scripting skills (Python, Tcl, SKILL) for automation and flow customization.

  • Ability to work with cross-functional teams including IC design engineers, packaging egineers, and foundries

Additional Skills:

  • Strong problem-solving skills and attention to detail.

  • Excellent communication and teamwork skills.

  • Ability to document design processes, specifications, and reviews.

  • Familiarity with 3DBlox interposer modelling language is a plus

Preferred Qualifications:

  • Hands-on experience with high-density interposers in complex packaging environments.

  • Strong scripting skills to automate the interposer design flow

  • Previous experience at semiconductor or advanced packaging companies.

Educational Background:

  • Bachelor’s in Electrical Engineering, Microelectronics, or related fields and 8+ years of related experience, or a Master’s degree and 6+ years of related experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $120,000 - $192,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

HQ

Broadcom San Jose, California, USA Office

1320 Ridder Park Drive, San Jose, CA, United States, 95131

Similar Jobs

2 Days Ago
In-Office
108K-173K Annually
Senior level
108K-173K Annually
Senior level
Software • Semiconductor • Manufacturing
Responsible for physical design of chips, floorplanning, PnR, timing closure, physical verification, and automation of design flow using scripting languages.
Top Skills: GdsiiIc DesignIr/Em AnalysisMentor CalibrePerlPnrPythonTcl
16 Days Ago
In-Office
San Jose, CA, USA
120K-192K Annually
Senior level
120K-192K Annually
Senior level
Software • Semiconductor • Manufacturing
The engineer will verify complex switch designs, create verification environments, execute test plans for RTL and gatesim-based designs, and develop testing vectors.
Top Skills: Scripting LanguagesSystemverilogUvm
16 Days Ago
In-Office
San Jose, CA, USA
120K-192K Annually
Senior level
120K-192K Annually
Senior level
Software • Semiconductor • Manufacturing
The R&D Engineer will verify complex switch designs, create verification environments using SystemVerilog, execute test plans, and develop ATE testing vectors and C-based diagnostics for silicon testing.
Top Skills: C ProgrammingSystemverilogUvm

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account