Intel Logo

Intel

Senior CPU RTL Design Engineer

Posted One Month Ago
Be an Early Applicant
In-Office
Austin, TX
164K-312K Annually
Senior level
In-Office
Austin, TX
164K-312K Annually
Senior level
Design and implement CPU RTL for integer, floating point, and reservation station logic. Drive RTL coding, simulation, and optimization for power, performance, area, and timing. Participate in architecture definition, review verification plans, resolve RTL test failures, and provide technical leadership and cross-team collaboration to deliver CPU IP for full-chip integration.
The summary above was generated by AI
Job Details:

Job Description: 
Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.

Life at Intel


We developed the Intel microprocessors, a foundational technology that powers a diverse range of devices-from entry-level PCs to high-end gaming desktops and laptops, as well as data center solutions and many other applications. As part of our team, you will help design the next generation of high-performance microprocessors. We are looking for a skilled individual who is hands-on with RTL implementation for integer, floating point and reservation station logic and can provide technical leadership to deliver world-class products.
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to:
• Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
• Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Technical Guidance: Provide technical leadership and support to the design team leadership including proposing creative, innovative methodology and process initiatives to consistently improve efficiency and quality.
• Cross team collaboration: Work closely with architecture and backend teams and with other design teams towards achieving best-in-class products.
• Build a strong and technically vital organization. Cultivate and reinforce appropriate group values, norms and behaviors.
Behavioral traits that we are looking for:
• Excellent in problem-solving, analytical.
• Excellent written and verbal communication skills.
• Ability to work effectively in a fast-paced environment and collaborative environment.

Qualifications:
Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Education Requirement
• Bachelor's degree in Computer Science, Electrical, Electronics, Engineering, or related field with 8+ years of work experience OR
• Master's degree in Computer Science, Electrical, Electronics, Engineering, or related field with 7+ years of work experience OR
• PhD in Computer Science, Electrical, Electronics, Engineering, or related field with 4+ years of work experience.
Minimum Required Qualifications:
• 6+ years of experience in silicon development in CPU microarchitecture and logic design.
• 5+ years of experience in technical leadership including delivering successful IP Projects.
• 6+ years of experience with Timing Closure, Power Convergence; integer and/or floating point, OOO execution, reservation station design.
Additional Preferred Qualifications:

• Advanced degree in Computer Science, Electrical, Electronics, Engineering, or related field.

• Experience on x86 CPU microarchitecture
• Experience with driving front end methodologies and championing the use of automation / AI tools to realize tangible benefits visible at the product level.
Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.
Benefits at Intel
Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits ' Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Texas, Austin

Additional Locations:US, Oregon, Hillsboro

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $164,470.00-311,890.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
HQ

Intel Santa Clara, California, USA Office

Robert Noyce Building, Santa Clara, CA, United States, 95052

Intel Mountain View, California, USA Office

Mountain View, United States

Intel San Jose, California, USA Office

San Jose, United States

Intel Santa Clara, California, USA Office

2200 Mission College Blvd. , Santa Clara, CA, United States, 95054

Intel Sunnyvale, California, USA Office

Sunnyvale, United States

Similar Jobs

One Month Ago
In-Office
Santa Clara, CA, USA
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
The role involves defining and implementing RTL for high-performance RISC-V CPUs, collaborating with various teams to ensure design meets functional, timing, and power goals while using innovative optimization techniques.
Top Skills: Power Analysis ToolsRisc-VRtlSimulation ToolsSynthesis ToolsVerilogVhdl
55 Minutes Ago
In-Office
86K-116K Annually
Senior level
86K-116K Annually
Senior level
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Provides field-based technical and engineering support for the B-52 Commercial Engine Replacement Program. Advises Air Force customers and maintainers, interprets technical orders, researches aircraft maintenance issues, develops corrective solutions, analyzes recurring problems, and coordinates with engineering, logistics, and program teams. Requires extensive B-52 avionics or electrical maintenance experience, frequent travel or deployment, possible relocation, U.S. person status, and an active Secret clearance.
Top Skills: Air Force Maintenance Recording SystemsAircraft Maintenance DocumentationB-52 AvionicsElectrical SystemsUsaf Technical Orders
55 Minutes Ago
In-Office
83K-113K Annually
Junior
83K-113K Annually
Junior
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Supports aircraft maintenance, modification, and upgrade programs through industrial engineering analysis and process improvement. Responsibilities include work scheduling, capacity planning, staffing analysis, production metrics, data analysis, Lean process improvements, resource optimization, and process documentation. The role requires gathering data in manufacturing areas and on aircraft, developing spreadsheets and operating schedules, and consulting with internal customers. This is a 100% onsite, variable-shift position in San Antonio.
Top Skills: 3D CadAurora ModelingExcelMS OfficeMicrosoft PowerpointMicrosoft ProjectMicrosoft WordOracleSQL Server

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account