Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. The AI Silicon Engineering (AISiE) SoC Design Verification team is seeking a Senior Design Verification Engineer who can work with cross-discipline teams (including systems, firmware, architecture, design, validation, and product engineering) to develop environment and test cases to verify Microsoft’s latest AI accelerators.
We are looking for a Senior Design Verification Engineer to join the team.
Responsibilities
- Creation of complex verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation.
- Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification.
- Create and drive test-plans and test development to provide complete features coverage.
- Develop and implement technical solutions to complex quality and design challenges.
- Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage.
- Triage and debug testbench, simulation, and emulation fails.
- Develop Makefiles and scripts for scalable and efficient verification.
- Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment.
- Collaborate with teams across sites and geographies.
Qualifications
Required Qualifications:
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
- Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
- This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications:
- BS/MS in Electrical, Computer or Software Engineering.
- 6+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
- 1+ years’ industry experience of chip and/or computer architecture.
- 1+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl.
- Prior experience in two or more of the following will also be valuable:
- CPU or graphics core verification.
- In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage.
- Experience with hardware design for embedded systems.
- Firmware development, with secure and non-secure boot flow.
- Experience with hardware emulation or FPGAs.
- Design experience or ability to write synthesizable code.
- Software development experience.
- Effective communication skills.
- Energetic and self-motivated.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
Microsoft Mountain View, California, USA Office
1065 La Avenida, Mountain View, CA 94043, Mountain View, United States, 94043
Microsoft Palo Alto, California, USA Office
Palo Alto, United States
Microsoft San Francisco, California, USA Office
835 Market Street, Suite 700, San Francisco, CA 94103, San Francisco, United States, 94103
Microsoft San Jose, California, USA Office
San Jose, United States
Microsoft Sunnyvale, California, USA Office
Sunnyvale, United States
Similar Jobs
What you need to know about the San Francisco Tech Scene
Key Facts About San Francisco Tech
- Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
- Major Tech Employers: Google, Apple, Salesforce, Meta
- Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
- Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
- Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
- Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine
