Develop and optimize low-level GPU software for oneDNN, including GEMM, convolution, attention, JIT-generated kernels, fusion, memory traffic, and mixed-precision execution. Build performance models, profile bottlenecks, improve validation and benchmarking infrastructure, and co-design GPU primitives with hardware and compiler teams for next-generation Intel GPUs.
Job Details:Job Description:
Annual Salary Range for jobs which could be performed in the US: $195,200.00-275,580.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
About the Role
The Software and AI (SAI) organization is seeking a highly skilled software engineer to contribute to the development and low-level optimization of oneDNN, a complex, cross-platform, open-source performance library that serves as the foundation for deep learning applications (github.com/uxlfoundation/oneDNN).
Please Note: This is a low-level software engineering and hardware-acceleration role. It does not involve building, training, or tuning machine learning models. Instead, you will focus on developing highly optimized math primitives, parallel algorithms, and GPU kernels that power industry-leading AI frameworks (such as OpenVINO, TensorFlow, PyTorch, and ONNX Runtime) on Intel hardware.
Key ResponsibilitiesKernel Development and Architecture
- Develop high-performance GEMM, convolution, and attention kernels for AI workloads
- Design scalable JIT and codegen infrastructure for GPU kernel generation
Low-Level Optimization
- Implement fusion and memory-traffic optimizations to maximize hardware utilization
- Optimize mixed-precision and quantized execution paths (e.g., BF16, FP16, INT8, FP8, FP4, etc.)
Performance Modeling and Profiling
- Build analytical and empirical performance models for kernel dispatch and tuning
- Profile and eliminate performance bottlenecks across oneDNN GPU primitives and runtime paths
Hardware and Software Co-Design
- Co-design GPU primitives and kernel architectures for next-generation Intel GPUs
- Partner with hardware and compiler teams to shape future accelerator capabilities and software stacks
Infrastructure and Validation
- Improve validation, benchmarking, and CI infrastructure for performance-critical GPU workloads
Massive Scale
- Work on a global, high-impact open-source library that scales AI performance across millions of devices worldwide
Cutting-Edge Hardware
- Get early access to and influence the software stack for Intel's roadmap of next-generation discrete GPUs
Expert Collaboration
- Work alongside industry-leading experts in GPU compilers, hardware architecture, and performance libraries
Total Rewards
- Enjoy a competitive package including stock programs, quarterly bonuses, robust healthcare, and highly flexible hybrid/remote working options
To be successful in this role, you should demonstrate the following professional traits:
- A strong ownership mindset — you take initiative on complex, ambiguous technical problems and drive them to resolution
- A collaborative approach — you work effectively across hardware, compiler, and framework teams to align on shared technical goals
- A performance-driven curiosity — you are motivated by squeezing every cycle out of hardware and continuously seek deeper understanding of low-level systems
Minimum Qualifications
- Education: BSc, MSc, or PhD in Computer Science, Computer Engineering, Mathematics, Physics, or a highly technical related field
- Core Language: 5+ years of professional software development experience with expert-level modern C++
- Performance Optimizations: 2+ years of hands-on experience in programming and kernel optimization on GPUs (via SYCL/DPC++, OpenCL, CUDA, or HIP), or at least 5+ years of similar low-level performance optimization experience on CPUs
- Hardware Architecture: Strong foundations in computer architecture, cache hierarchies, memory subsystems, and parallel programming paradigms (e.g., multi-threading, SIMD/vectorization)
Preferred Qualifications
- Math Libraries: Experience developing high-performance math libraries (e.g., GEMM, convolution, reduction, or FFT kernels)
- Low-Level Tuning: Hands-on experience with GPU assembly-level tuning or compiler optimization
- Parallel APIs: Familiarity with parallel programming APIs such as OpenMP or oneTBB
- AI Workload Context: Basic understanding of deep learning primitives (e.g., forward/backward passes) to understand how library code is utilized by upstream frameworks
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, Santa ClaraPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $195,200.00-275,580.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Intel Santa Clara, California, USA Office
Robert Noyce Building, Santa Clara, CA, United States, 95052
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2200 Mission College Blvd. , Santa Clara, CA, United States, 95054
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