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Uniphore

Senior Inference Engineer

Posted 18 Days Ago
Be an Early Applicant
In-Office
Palo Alto, CA, USA
159K-199K Annually
Senior level
In-Office
Palo Alto, CA, USA
159K-199K Annually
Senior level
Build and optimize a production inference runtime for fine-tuned small language models across cloud, on-premises, NVIDIA, and AMD GPU environments. Responsibilities include context management, KV and prefix caching, speculative decoding, GPU kernel optimization, continuous batching, quantization, multi-GPU execution, adapter lifecycle management, observability, tenant isolation, failure recovery, and safe deployment rollouts. The role requires hands-on engineering with GPU systems, distributed inference, ML serving, and inference performance optimization.
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Uniphore is the Business AI company. Our sovereign, composable and secure AI platform connects enterprise data, fine-tunes AI models and deploys agentic AI across the enterprise. We empower every worker to boost productivity and help businesses grow faster, operate smarter and reduce costs. Trusted by more than 2,000 businesses globally, and recognized on the Deloitte Fast 500, Uniphore delivers on the promise of AI as a transformative force for business.


Job Description:
 

Senior Inference Engineer –

Uniphore is building an enterprise AI platform where agents operate across voice, video, text, and structured data in real time. We are looking for a Senior or Staff Inference Engineer to own the inference layer — combining deep model inference expertise with systems engineering to deliver a context-aware runtime serving finetuned SLMs across cloud, on-premises, and widely used GPU platforms.


This is a hands-on individual contributor role working closely with Uniphore’s research, model engineering, knowledge systems, agent, and pla4orm teams.

What You Will Build Context-aware runtime: Integrate context selection, compression, conversation compaction, and persistent task state with model execution. Adapt context budgets, model selection, and reasoning effort to each task.

KV-cache and computation optimization: Build paged KV-cache and prompt-prefix-cache management, cache-aware routing, retention, eviction, and offloading. Preserve correctness as context, permissions, model versions, and adapters change.

Inference performance: Implement and tune speculative decoding, aQention kernels, continuous batching, quantization, chunked prefill, and multi-GPU parallel execution.

SLM and adapter lifecycle: Build model and adapter lifecycle management, multi-adapter serving, zero-downtime hot swapping, and resource scheduling.

Production reliability: Implement observability (DCGM, Prometheus, Grafana), tenant isolation, overload protection, failure recovery, and safe rollout and rollback.

Cross-environment deployment: Build portable runtime integrations across NVIDIA and AMD GPU pla4orms, cloud and on-premises environments, and single- or multi-GPU configurations.


Technical Expertise

Model inference internals: Autoregressive generation, prefill vs. decoding, aQention architectures, compute- vs. memory-bound execution, numerical precision.

Speculative decoding: DraY-and-verify execution, acceptance/rejection sampling, adaptive speculation, and throughput tradeoffs.

GPU kernels: FlashAQention-style kernels, tiling, operator fusion, memory access paQerns.

CUDA, HIP, Triton, or CUTLASS proficiency.

KV and prefix caching: Paged KV storage, fragmentation, cache quantization, offloading, cross request prefix reuse, tenant isolation.

Context-window management: Token budgeting, context selection, prompt compression, conversation compaction, sliding window and sparse aQention.

Serving and scaling: Continuous batching, chunked prefill, admission control, quantization, multi-GPU parallelism, prefill/decode disaggregation.


Qualifications Required:

• 3+ years engineering, including hands-on with GPU systems, distributed

inference, or ML serving

• Production experience with vLLM, SGLang, or TensorRT-LLM

• Strong Python and C++ (C++17/20)ti ability to read and debug CUDA C++ or HIP kernels

• Hands-on GPU profiling and performance optimization

 

Preferred:

• Custom GPU kernel development (CUDA, HIP, Triton, CUTLASS)

• PyTorch internals — torch. Compile, custom operators, MoE or disaggregated

prefill/decode

• LoRA/SLM adapter serving and zero-downtime hot swapping

• NVIDIA and AMD Instinct hardware in production

• Telemetry with DCGM, AMD SMI, Prometheus, and Grafana


 


Hiring Pay Range:

$159,000 - $198,800

Benefits:


In addition to competitive base pay, this position also includes an annual incentive opportunity based on target achievement,  pre-IPO stock options, benefits including medical, dental, vision, 401(k) with a match, and more, plus generous paid time off, paid holidays, paid day off for your birthday and other paid leave policies to support employees through all phases of life.


Location preference:

USA - CA - Palo Alto

Uniphore is an equal opportunity employer committed to diversity in the workplace. We evaluate qualified applicants without regard to race, color, religion, sex, sexual orientation, disability, veteran status, and other protected characteristics.
 
For more information on how Uniphore uses AI to unify—and humanize—every enterprise experience, please visit www.uniphore.com.

HQ

Uniphore Palo Alto, California, USA Office

1001 Page Mill Road, Palo Alto, CA, United States

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