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Astera Labs

Technical Lead Product Engineer

Reposted 15 Days Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
160K-195K Annually
Senior level
In-Office
San Jose, CA, USA
160K-195K Annually
Senior level
Lead and develop next-generation high-speed semiconductor products, focusing on product and test engineering, circuit design, and problem-solving.
The summary above was generated by AI

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Job Description:

We are seeking an experienced and hands-on Technical Lead Product Engineer to lead and develop next generation high-speed, high performance and low power semiconductor products in advanced process node. The ideal candidate possesses breadth of industry experience in high-speed product development in the field of product and/or test engineering, can apply fundamentals in circuit, ATE, and test program to aid problem solving, and is a self-driven, result focused go-getter in the pursuit of goals and objectives.

Basic Qualifications:

  • Minimum of 5 years of experience in the field of post silicon product development dealing with high-speed XCVR (product, test or validation)
  • Experience in working with PCIe Gen3 and above
  • Have gone through at least one cycle of full product development life cycle
  • Strong academic/technical background in electrical or computer engineering; Bachelor’s is required; MS preferred
  • Strong problem-solving skills that involve system level analysis with test hardware, test program and DUT.
  • Digital and analog circuit level understanding for DUT.
  • Excellent team player with great communication skills
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks

Required Experience:

  • Hands on experience with using the Advantest 93k ATE platform with specific skills updating ATE test programs for wafer sort and final test solutions
  • Hands-on knowledge of NRZ/PAM4 SerDes protocols like PCIe (Gen3 and above), Ethernet (25G and above), etc. and/or memory interfaces such as (LP)DDR5/4.
  • Detailed mindset monitoring device ATE test yields, ATE test time, device quality and rolling out new ATE test programs using consistent BKMs
  • Strong data analysis skills using tools such as JMP or Spotfire calculating limits and drawing conclusions
  • Energetic work mindset meeting the demands of shipping quality parts to Astera Labs’ customers through the manufacturing stage of development

Preferred Experience:

  • Working with silicon validation teams to ensure device performance meets production requirements.
  • Firmware development in C/C++, scripting in Python, or other equivalent programming experience.
  • Hands on experience in product/package qualification

The base salary range is USD 160,00 - USD 195,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

HQ

Astera Labs Santa Clara, California, USA Office

Santa Clara, CA, United States, 95054

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