Jobs at TetraMem

Develop and release ATE test programs using Teradyne tools, support testing infrastructure, drive optimization for production, and collaborate with product teams.

Develop and optimize Python or C++ code to compress, convert, deploy, and run neural network models efficiently on analog compute-in-memory chips. Profile performance, support software design and runtime environments, collaborate with AI researchers and hardware engineers, and participate in code reviews, testing, and documentation.

The Head of Software will define TetraMem's software roadmap, oversee ML systems development, and lead compiler/toolchain and embedded software projects, while building and mentoring a technical team.

The Application Engineer provides technical support for AI products, collaborates with customers, and resolves issues while maintaining documentation and driving customer satisfaction.

The Analog Layout Engineer will design and implement analog and mixed-signal layouts, lead layout engineers, and ensure design quality meets guidelines.

The role involves defining and implementing test plans for SoC design verification, developing testbenches, debugging simulations, and mentoring junior engineers.

Develop and optimize a compiler toolchain for translating deep learning models, collaborating with ML and hardware teams. Requires significant industry experience in compiler development.

The Device Testing Engineer conducts hands-on testing of devices, analyzes data, prepares reports, maintains equipment, and collaborates with development teams on improvements.

Develop and deploy lightweight machine learning models for edge AI, working on hardware integration and optimization techniques while mentoring junior engineers.

The engineer will design analog integrated circuits, conduct simulations and validations, collaborate with teams, mentor juniors, and document specifications.

Develop and optimize lightweight machine learning models for edge AI applications, integrating into production systems and mentoring junior engineers.

The role involves leading RTL design and verification for ASIC/SoC products, mentoring junior engineers, and performing PPA analysis to optimize designs.

The Business Development Lead will drive revenue growth by aligning TetraMem's technology with customer solutions, manage long sales cycles, and develop key industry relationships.

The role involves developing mixed-signal verification plans, creating testbenches, writing test cases, collaborating with design teams, and optimizing verification methodologies for IC designs.

Support the design, verification, and integration of digital systems in AI accelerators through RTL design and simulations.

Develop and optimize compiler, runtime, and SDK components for TetraMem's analog compute-in-memory AI hardware. Translate ML models into efficient executables, implement low-level optimizations and debugging tools, integrate ML frameworks and deployment pipelines, benchmark and profile workloads, support hardware bring-up and validation, and collaborate across teams to improve system performance.

Design, develop, and optimize embedded software for AI-driven applications. Lead technical efforts and mentor junior engineers, ensuring performance and reliability in real-time systems.

Support deployment and integration of low-power edge inference systems, troubleshoot hardware/software issues, and assist clients in optimization of ML models.

Develop and optimize Python and C++ software to compress, convert, deploy, and run neural networks on analog compute-in-memory hardware. Implement quantization, pruning, graph optimizations, runtime APIs, and profiling tools. Collaborate with researchers and hardware engineers, perform testing, debugging, and CI, and support research, documentation, and validation of hardware-software co-design for edge and embedded AI systems.

Develop and maintain in-house CAD tools and automation for analog/digital IC design and SoC sign-off. Optimize EDA license usage, research advanced CAD methodologies, mentor junior engineers, collaborate with design/verification/IT/EDA vendors, and participate in design reviews to improve processes.