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Broadcom

Senior Physical Design Engineer

Posted Yesterday
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In-Office
San Jose, CA, USA
122K-195K Annually
Senior level
In-Office
San Jose, CA, USA
122K-195K Annually
Senior level
Lead block- and top-level ASIC physical design from floorplanning through GDSII stream-out. Execute placement, clock-tree synthesis, routing, timing and power closure, signal-integrity optimization, and IR-drop/electromigration signoff on advanced 5nm, 3nm, and 2nm nodes. Automate design flows using TCL, Python, and Unix shell scripting while providing technical leadership across complex AI and PCIe switch ASIC projects.
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Job Description:


Who We Are — Physical Design Team in APD

Broadcom’s ASIC Products Division (APD) is the global leader in custom high-performance silicon solutions. We partner with the world’s most innovative technology companies—spanning hyper-scale cloud providers, AI pioneers, and tier-1 networking infrastructure leaders—to co-design and manufacture complex, custom ASICs that power the modern digital backbone.


The Physical Design team within APD is the world-class execution engine behind the industry's most advanced custom silicon. We push the limits of silicon technology by combining deep architectural expertise, advanced IP, cutting edge physical design methodologies in 3nm/2nm nodes, and advanced 2.5D/3D chiplet integration to solve the most demanding compute and bandwidth challenges.We transform ultra-complex architectures into fully realized, high-yielding, first-pass silicon success.


Broadcom is searching for an Senior Physical Design Engineer to join the ASIC Products Division. This position involves working with the latest technology to continue driving next generation Artificial Intelligence and  PCIe Switch Products. More specifically, this position will require in-depth knowledge and expertise in all Physical Design aspects of taking RTL to silicon tape-out.


Key Responsibilities

Full-Flow Implementation: Lead block-level and top-level implementation from floorplanning to GDSII stream-out using Cadence Innovus

Advanced Node Execution: Drive floorplanning, placement, CTS, routing, and timing/power optimization on advanced technology nodes (5nm, 3nm, 2nm) using multi-patterning and complex metal stacks.

Timing & Power Closure: Perform multi-corner multi-mode (MCMM) static timing analysis (STA), signal integrity (SI) optimization, and power grid optimization (static/dynamic IR-drop, EM) for signoff using PrimeTime, Voltus, or RedHawk.

Qualifications & Requirements

Education: B.S. or M.S. degree in Electrical Engineering, Computer Engineering, or a related technical field.

Experience: 8+ years of hands-on physical design experience successfully taping out complex high-frequency, ultra-large-scale networking or AI ASICs.

Deep Sub-Micron Expertise: Direct experience executing tapeouts in TSMC advanced nodes (N7, N5, N3) or equivalent foundry processes.

EDA Tool Mastery: High proficiency in major physical design tool flows:

P&R: Cadence Innovus

Timing/STA: Synopsys PrimeTime or Cadence Tempus

Extraction & IR/EM: StarRC / QRC, RedHawk

DRC/LVS: Siemens Calibre

Automation Skills: Advanced TCL, Python, and Unix shell scripting for flow automation and database manipulation.

Communication: Excellent technical leadership, problem-solving, and cross-functional communication skills.

Preferred Qualifications

Strong background in high-speed clock network implementation (H-tree, mesh, low-power CTS).

Experience with power-aware implementation flows (UPF/CPF, multi-voltage domains, clock/power gating).


Compensation and Benefits


The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

HQ

Broadcom Palo Alto, California, USA Office

Palo Alto, CA, United States

Broadcom Richmond, California, USA Office

13711 International Pl Unit 200, Richmond, British Columbia, V6V 2Z8, Canada, Richmond, Canada, V6V 2Z8

Broadcom San Francisco, California, USA Office

San Francisco, United States, 0

Broadcom San Jose, California, USA Office

1320 Ridder Park Drive, San Jose, CA, United States, 95131

Broadcom Santa Clara, California, USA Office

Santa Clara, United States, 0

Broadcom Sunnyvale, California, USA Office

190 Mathilda Pl, Sunnyvale, California, 94086-6076, United States, Sunnyvale, United States, 94086-6076

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