Renesas Electronics Logo

Renesas Electronics

Senior Staff Analog Engineer

Posted 5 Days Ago
Be an Early Applicant
Hybrid
San Jose, CA, USA
185K-235K Annually
Senior level
Hybrid
San Jose, CA, USA
185K-235K Annually
Senior level
Designs and verifies complex analog and mixed-signal circuits for custom ASICs, including CMOS, high-voltage, power management, and motor-driver applications. Responsibilities include circuit feasibility studies, AMS simulation, layout guidance, silicon debugging, lab characterization, test development, documentation, design reviews, and collaboration with DFT, test, product, and project teams.
The summary above was generated by AI
Company Description

Renesas Electronics is expanding its Configurable Mixed-Signal Division (CMSD), the team behind the market-leading GreenPAK™ product family. With billions of units shipped globally, this customer-configurable platform enables companies to differentiate their products, reduce BOM costs, and accelerate development times across automotive, industrial, data center, and consumer applications.

As we continuously expand our portfolio to include high-performance analog IPs, DC-DC converters, and FPGAs, we are seeking an Analog Senior Staff Engineer – High-Voltage Analog/Precision to join our R&D organization.

Job Description

As a Senior Staff Analog Engineer, you will design and verify complex analog block-level and sub-system circuits to meet the functional and performance specifications of custom mixed-signal ASICs to give the company a competitive advantage in the IC market. It will be your responsibility to perform feasibility studies and analyze new analog design concepts. You will be involved in the comparison of competitor solutions and propose differentiating solutions.

Responsibilities

  • Specify and design  CMOS circuits meeting performance, area, power, and timescale constraints.
  • Run analog/mixed signal verification simulations at block and/or chip level.
  • Collaborate with project leads to achieve the system and design strategy for custom ASICs.
  • Guide the layout team to ensure quality of layout of own designs.
  • Produce high-quality documentation for the designed circuits.
  • Work closely with DFT engineers to ensure alignment to DFT strategy and implementation.
  • Drive silicon debugging and design characterization.
  • Support and participate in lab evaluation and characterization for own designs.
  • Work with test and product engineers to support test development and ramp to production.
  • Take a proactive approach to driving your own development plan, utilizing team members, and internal development opportunities.
  • Participate and have a consulting function in design reviews.
  • Review IC design, evaluation, characterization and test results.
  • Schedule tasks and report progress to the project leader, identify possible project problems

 

Qualifications

  • Fully competent in all common aspects of analog design.
  • Design experience in motor driver (DC, stepper, BLDC).
  • Design experience in power management circuits and exposed to high voltage (BCD process).
  • Design experience in data acquisition and processing systems such as ADC, DAC and current sensor is a plus.
  • Knowledge of modelling analog circuits and reviewing AMS simulations.
  • Strong competence in EDA design tools and the Cadence design environment.
  • Concise and precise communication and presentation skills within a multi-site and multi-cultural environment.
  • Human relations skills are important to convince others (e.g., in projects) based on technical knowledge and show assertiveness to alert superiors/colleagues
  • Apply advanced methods to complex problems. Demonstrate understanding of interfaces with other disciplines
  • Able to propose innovative and leading-edge solutions

Education

  • MSEE + 10 years of experience in analog and mixed-signal design.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

Renesas Electronics Milpitas, California, USA Office

Milpitas, United States

Renesas Electronics San Jose, California, USA Office

San Jose, United States

Renesas Electronics Santa Clara, California, USA Office

Santa Clara, United States

Similar Jobs

5 Days Ago
In-Office
175K-200K Annually
Senior level
175K-200K Annually
Senior level
Semiconductor • Manufacturing
Leads analog architecture and design for complex ATE ICs, including circuit development, schematic and layout reviews, verification, mixed-signal simulation, silicon bring-up, characterization, and debugging. Provides technical leadership across projects, mentors engineers, establishes design standards, and collaborates with engineering, product, and customer teams to guide future product direction.
Top Skills: Analog And Mixed-Signal Eda ToolsAnalog CmosAte IcsFeedback SystemsMixed-Signal SimulationStability Analysis
8 Days Ago
In-Office
Santa Clara, CA, USA
150K-250K Annually
Senior level
150K-250K Annually
Senior level
Semiconductor • Manufacturing
Designs, simulates, verifies, and refines multi-gigabit PAM4 SerDes IP and analog/mixed-signal receiver blocks, including TI-SAR ADCs, CTLE, DFE, and AFE components. Responsibilities include CDR development, high-speed testing with oscilloscopes and BERT, analog-digital interface verification, layout optimization, clock and synchronization design, and IP documentation. The engineer collaborates with system and test teams on high-speed interfaces, packages, boards, and system clocks for image sensor and bridge chip products.
Top Skills: AfeBertCadenceCdrClock TreesClock-Domain CrossingCtleDfeOscilloscopesPam4RtlSerdesSpectremdlSpiceTi-Sar Adc
8 Days Ago
In-Office
Santa Clara, CA, USA
186K-220K Annually
Senior level
186K-220K Annually
Senior level
Semiconductor • Manufacturing
Design and optimize transistor-level analog and mixed-signal circuits for CMOS image sensors. Perform block, transistor-level, and whole-chip simulations; oversee floor planning and layout using Cadence Virtuoso and Calibre. Define sensor readout timing, collaborate with verification, process, test, and applications teams, and debug and characterize fabricated sensors. Research new circuits, develop innovative solutions, and support products from concept through release.
Top Skills: Cadence VirtuosoCalibreCmosCmos Image Sensors

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account