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Cadence Design Systems

Sr. Principal Software Engineer, Physical Verification

Posted 2 Days Ago
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In-Office
San Jose, CA, USA
161K-299K Annually
Senior level
In-Office
San Jose, CA, USA
161K-299K Annually
Senior level
Develop and validate software for physical verification of advanced semiconductor devices. Solve complex mathematical and geometric problems, maintain reliable engineering applications, collaborate with global R&D teams, participate in code reviews, and improve development processes for next-generation chip design and manufacturing technologies.
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Overview

We are seeking a talented Software Engineer to join our Research & Development (R&D) group, focused on creating advanced software solutions for physical verification products at leading-edge semiconductor nodes. This role is essential to driving innovation in the development and validation of software used in the design and manufacturing of next-generation chips.

Responsibilities

  • Design, develop, and implement robust software for physical verification of advanced semiconductor devices.
  • Validate, maintain, and document software solutions to ensure reliability and accuracy.
  • Solve complex mathematical and geometric challenges related to semiconductor verification.
  • Collaborate with global team members to deliver high-quality results in a distributed environment.
  • Contribute to technical discussions, code reviews, and process improvements.
     

Required Qualifications

  • Master’s degree in Computer Science or Computer Engineering & 10+ years work experience
  • Strong proficiency in C and C++ programming languages.
  • Solid problem-solving skills and the ability to tackle technical challenges.
  • Effective written and verbal communication skills for collaboration across teams.
     

Desired Skills

  • Exceptional math background, including the ability to address complex mathematical and geometric problems.
  • Expert in Physical Verification domain or Computational Geometry
  • Experience in developing software for engineering or scientific applications.
  • Ability to quickly learn new technologies and adapt to project requirements.
     

Work Environment

You will be part of an innovative, geographically distributed team dedicated to advancing the capabilities of physical verification software for semiconductor technology. The work environment encourages collaboration, technical excellence, and continuous learning.

The annual salary range for California is $161,000 to $299,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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Cadence Design Systems San Jose, California, USA Office

2655 Seely Avenue, San Jose, CA, United States, 95134

Cadence Design Systems Santa Clara, California, USA Office

Santa Clara, United States

Cadence Design Systems Sunnyvale, California, USA Office

Sunnyvale, United States

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