Top Senior Hardware Engineer Jobs in San Francisco Bay Area, CA

The Senior Hardware Reliability Engineer ensures product reliability through planning, testing, and collaboration across engineering and operations. Responsibilities include leading investigations, analyzing failure data, and designing reliability strategies throughout the product lifecycle.

As the Founding Hardware Engineer, you will design the hardware for tactile systems in humanoid robotics, focusing on PCB design, firmware development, and partner management.

The Hardware Engineer designs and develops custom hardware solutions for autonomous vehicles, oversees vendor operations, and ensures compliance with industry standards.

As a Founding Hardware Engineer, you'll lead the design and development of robust hardware for aviation environments, ensuring reliable data streaming and regulatory compliance.

Lead the hardware engineering team in developing robust systems for wireless power transfer, overseeing design, integration, and testing processes.

The Hardware Engineer will design, integrate, and validate hardware for autonomous machines, working on system architecture and collaborating with engineers and vendors.

Lead the hardware engineering team to develop and produce agricultural technology hardware, manage manufacturing operations, and ensure design quality while collaborating cross-functionally.

The Principal Hardware Engineer will lead the design of hardware systems for a satellite communications platform, focusing on power distribution, signal integrity, and PCB design, while ensuring high-reliability and fault tolerance in space environments.

The Hardware Reliability Engineer plans and executes reliability testing, develops testing methods, performs failure analysis, and collaborates with cross-functional teams to ensure product quality.

The Hardware Reliability Engineer will oversee reliability testing for Skip's wearable devices, manage FMEA, perform environmental stress testing, and lead root cause analyses to ensure product performance in real-world conditions.

Lead mechanical design for AI supercomputers, collaborating with teams to optimize thermal solutions and validate mechanical systems, ensuring reliability and performance.

The Staff Hardware Design Engineer designs hardware infrastructure for Fastly, collaborating with teams to ensure scalable and performant systems. Responsibilities include developing specs, guiding hardware selection, overseeing testing, and mentoring junior engineers.

Lead the development of hardware platforms, collaborate with cross-functional teams, ensure design compliance, and mentor junior engineers in hardware development.

The Hardware Systems Engineer will lead interdisciplinary projects on the development and optimization of Mill's food recycling technology, focusing on system performance and collaboration with various engineering teams.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

The Senior Mask Layout Design Engineer will perform physical layout for mixed-signal designs, collaborate with engineers, and ensure compliance with design rules.

The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.

The Hardware Design Engineer will develop and verify digital designs using SystemVerilog, support hardware bring-up, and collaborate with teams.

The Senior Principal Hardware Systems Engineer leads architecture of high-performance compute platforms, focusing on PCIe design, GPU integration, and system-level development, while managing cross-functional teams and vendor collaboration.

The Hardware Test Engineer will verify custom hardware systems, execute design verification tests, collaborate with engineering teams, and document testing results.

The Senior Hardware Test Engineer will validate Echo hardware systems, execute design verification tests, collaborate with engineers, and manage test protocol documentation.

As a Senior Hardware Engineer, you will define processor architecture, implement microarchitecture in SystemC/SystemVerilog, and optimize PPA across design cycles.

Design and verify mixed-signal layouts in sub-micron CMOS technologies, collaborating with ASIC engineers to ensure integration in VLSI products.

The role involves physical layout design for high-speed mixed-signal circuits, collaborating with cross-functional teams, and utilizing various design and verification tools.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.