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Design and verify high-speed SerDes cores and adaptive clock-data-recovery systems, ensuring robust performance in multi-standard interfaces. Mentor junior engineers and establish best practices in mixed-signal design.

The role involves designing, validating, and implementing high-performance CMOS analog circuits. Responsibilities include analyzing performance and mentoring junior engineers.

This role involves designing, testing, and mentoring in high-performance digital design for ASICs, requiring deep expertise in CMOS and data streaming.

The role involves designing and bringing to production high-speed CMOS ADCs and DACs, collaborating with teams, mentoring others, and achieving performance targets in analog design.

As a Staff Performance Modelling Engineer, you'll lead the creation of analytical models to enhance OTPU architecture while collaborating with engineering teams to meet performance goals.

As a Senior Compiler Engineer, you'll own projects, design compilers and runtimes for ML frameworks, optimize performance, and mentor teams.

The Staff Compiler Engineer will architect and build the ML backend, optimizing compilers and runtimes for AI models, collaborating with hardware teams, and guiding innovation in compiler technology.

The Senior Performance Modelling Engineer will develop analytical models and simulations to optimize optical compute systems, analyze workloads, and integrate performance testing into CI pipelines.

The Senior Talent Acquisition Partner will manage full-cycle recruiting, build sourcing strategies, partner with hiring managers, and improve processes while emphasizing candidate experience at Flux.

The Staff Performance Modelling Engineer will create analytical models for optical processors, guide design decisions, and analyze performance with coding in C++ and Python.