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Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

YesterdaySaved
In-Office
San Francisco, CA, USA
170K-285K Annually
Senior level
170K-285K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
The role involves verifying high-speed digital pipelines, developing verification environments, applying formal verification techniques, and collaborating with cross-functional teams.
Top Skills: MatlabNumpyPythonSimulinkSystemverilogUvm
YesterdaySaved
In-Office
San Francisco, CA, USA
274K-370K Annually
Expert/Leader
274K-370K Annually
Expert/Leader
Artificial Intelligence • Software • Semiconductor
The Director of Digital Design will lead ASIC design and verification efforts, manage a team, ensure performance targets, and collaborate cross-functionally.
Top Skills: AdcAsicDacEda ToolsRtlSerdesSoc DesignSynthesisTiming Closure
Reposted 10 Days AgoSaved
In-Office
San Francisco, CA, USA
230K-282K Annually
Senior level
230K-282K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
As a Senior Compiler Engineer, you'll own projects, design compilers and runtimes for ML frameworks, optimize performance, and mentor teams.
Top Skills: C/C++JaxLlvmMlirOpenxla/XlaPyTorchTensorFlowTvm
Reposted 10 Days AgoSaved
In-Office
San Francisco, CA, USA
275K-336K Annually
Senior level
275K-336K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
The Staff Compiler Engineer will architect and build the ML backend, optimizing compilers and runtimes for AI models, collaborating with hardware teams, and guiding innovation in compiler technology.
Top Skills: C/C++JaxLlvmMlirMxnetOpenxla/XlaPyTorchTensorFlowTvm
Reposted 10 Days AgoSaved
In-Office
San Francisco, CA, USA
230K-282K Annually
Senior level
230K-282K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
The Senior Performance Modelling Engineer will develop analytical models and simulations to optimize optical compute systems, analyze workloads, and integrate performance testing into CI pipelines.
Top Skills: C++Gem5JaxPythonPyTorchSystemcTensorFlow
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Reposted 10 Days AgoSaved
In-Office
San Francisco, CA, USA
194K-270K Annually
Senior level
194K-270K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
This role involves designing, testing, and mentoring in high-performance digital design for ASICs, requiring deep expertise in CMOS and data streaming.
Top Skills: 100 GbeCmosDdrEdaFpgaHbmMatlabPciePythonRtlSerdesSimulinkSystemverilogVerilogVhdl
Reposted 10 Days AgoSaved
In-Office
San Francisco, CA, USA
275K-335K Annually
Senior level
275K-335K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
As a Staff Performance Modelling Engineer, you'll lead the creation of analytical models to enhance OTPU architecture while collaborating with engineering teams to meet performance goals.
Top Skills: C++Gem5JaxPythonPyTorchSystemcTensorFlow
Reposted 18 Days AgoSaved
In-Office
San Francisco, CA, USA
24K-24K Annually
Senior level
24K-24K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
The Senior Talent Acquisition Partner will manage full-cycle recruiting, build sourcing strategies, partner with hiring managers, and improve processes while emphasizing candidate experience at Flux.
Top Skills: AIRecruitment Software
Reposted 19 Days AgoSaved
In-Office
2 Locations
24K-24K Annually
Senior level
24K-24K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
The Staff Performance Modelling Engineer will create analytical models for optical processors, guide design decisions, and analyze performance with coding in C++ and Python.
Top Skills: C++Gem5JaxPythonPyTorchSystemcTensorFlow
Reposted 19 Days AgoSaved
In-Office
San Francisco, CA, USA
173K-212K Annually
Senior level
173K-212K Annually
Senior level
Artificial Intelligence • Software • Semiconductor
The Senior People Partner will lead people operations, coach managers, ensure legal compliance, manage the employee lifecycle, and foster a high-performance culture at Flux.
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