Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

The role involves validating clocking structures in products, developing test plans, automation, and partnering with design teams to ensure high-quality verification of ASIC designs.

The role involves defining verification strategies, building infrastructure for SoC verification, and collaborating with various teams to meet project requirements.

As a Senior DFT Engineer, you'll develop DFT architecture for AI Chips, collaborating on DFT methodologies and ensuring product quality.

Develop AI systems for efficient inference, design and optimize kernels, and build domain-specific compilers and runtimes while collaborating with engineers.

The Senior Localization Engineer will build robust localization solutions using navigation maps for autonomous vehicles, ensuring real-time performance and adherence to automotive safety standards.

The Senior Formal Verification Engineer will verify sophisticated ASIC builds using formal methods, collaborate with architecture teams, develop verification environments, and support silicon debug.

Develop and design innovative circuits in deep submicron technologies, collaborate with teams for performance improvements, mentor junior members, and prototype ideas on test chips.

Design, deploy, and operate Kubernetes-based large-scale storage and data platforms. Build automation, tooling, telemetry, and observability. Troubleshoot distributed systems, support CI/CD and IaC, participate in on-call rotations, capacity planning, and launch readiness.

Lead ASPICE and HW SPICE assessments, mentor teams, and communicate findings to enhance process maturity in automotive programs. Requires strong ASPICE knowledge and program management experience.

Design and build real-time, physics-informed AI models and synthetic data pipelines for quantum calibration and decoding. Develop surrogate models and GPU-accelerated implementations, apply reinforcement and online learning for calibration policies, co-design low-latency calibration-decoding systems, and collaborate across engineering and research to enable fault-tolerant quantum hardware.