Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

Advise ISVs on designing, deploying, and optimizing large-scale accelerated AI infrastructure. Lead architecture reviews, POCs, benchmarks, and production deployment guidance across compute, networking, storage, containers, orchestration, observability, and CI/CD. Create reference architectures, sizing guidance, technical playbooks, demos, and whitepapers. Support cluster monitoring, reliability, and performance improvements. Up to 20% travel for customer engagements.

Develop and maintain AI networking communication frameworks, production benchmarking tools, and automation for large-scale AI training/inference. Enable models in benchmarking infrastructure, analyze end-to-end performance, perform large-scale parameter searches, and collaborate with networking and hardware teams to co-design features and optimize system performance.

Develop and implement compiler optimization algorithms for deep learning workloads, analyze networks, debug and profile GPU performance (CUDA), define public APIs, and deliver ahead-of-time and just-in-time compilation techniques for NVIDIA GPUs to improve inference performance, build times, and memory efficiency.

The role involves developing software for datacenter integration, managing infrastructure, ensuring reliability, and automating processes. Requires strong expertise in programming, CI/CD, and distributed systems.

The role involves deploying AI networking solutions in data centers, driving architectural decisions, troubleshooting network issues, and collaborating on customer projects for NVIDIA's technology solutions.

Design and implement RTL and system-level SoC modules, perform logic synthesis and timing analysis, integrate modules into SOC, collaborate with architects and verification teams, support silicon bring-up, and improve design flows and methodologies to enhance efficiency and chip yield.

Develop algorithms and optimizations for inference and compiler stack, enhance performance metrics, collaborate with hardware teams, and publish work on novel approaches.

Lead invention of AI-driven ASIC development methodology, identify cross-stage bottlenecks, build scalable data pipelines, define metrics, mentor engineers, and evaluate AI/EDA research to improve predictability and cycle time.

The Principal Chromium and CEF Engineer will work on custom CEF and Chromium code, focusing on improving performance, reliability, and security, while contributing to CI/CD and collaborating with the team on quality indicators.

Lead efforts in developing and enhancing PTX Compiler infrastructure for Generative AI and Deep Learning applications in NVIDIA GPUs. Collaborate with architecture teams to support AI workloads and ensure high-quality code generation.