Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

Develop and implement compiler optimization algorithms for deep learning workloads, analyze networks, debug and profile GPU performance (CUDA), define public APIs, and deliver ahead-of-time and just-in-time compilation techniques for NVIDIA GPUs to improve inference performance, build times, and memory efficiency.

Design and implement RTL and system-level SoC modules, perform logic synthesis and timing analysis, integrate modules into SOC, collaborate with architects and verification teams, support silicon bring-up, and improve design flows and methodologies to enhance efficiency and chip yield.

Lead invention of AI-driven ASIC development methodology, identify cross-stage bottlenecks, build scalable data pipelines, define metrics, mentor engineers, and evaluate AI/EDA research to improve predictability and cycle time.

Lead developer relations with US national labs and federal research: build strategic collaborations, embed NVIDIA quantum SDKs, run workshops and trainings, present at conferences, create reference implementations, and relay research needs to product and engineering teams to drive adoption of CUDA-Q, cuQuantum, CUDA-Q QEC, and NVQLink.

Build, scale, and harden deep learning training infrastructure for multi-thousand GPU clusters. Improve data loaders, distributed training, scheduling, and performance monitoring. Develop fault-resilient orchestration, training pipelines for massive video datasets, and collaborate with researchers and platform teams to maximize training efficiency, availability, and scalability.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Research and implement GPU-acceleration techniques for high-performance databases and ETL. Analyze and optimize data-intensive workloads, collaborate with hardware, systems, and research teams to influence next-generation architectures and programming models, and publish/share findings with customers and the community.

Research and develop techniques to accelerate large-scale applications on advanced CPU platforms. Analyze and optimize database and analytics workloads for CPU performance, collaborate with internal and external experts, publish findings, and influence next-generation hardware/software design.

Lead a team of performance engineers to optimize complex workloads on NVIDIA's CPUs and GPUs, driving technical excellence and innovation while mentoring team members and collaborating with cross-functional partners.