Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

Design and operate large-scale infrastructure supporting GPU- and CPU-based EDA workloads. Build automation for provisioning, configuration, deployment, lifecycle management, monitoring, health remediation, cluster enrollment, and recovery across Linux compute fleets. Integrate services with schedulers, infrastructure systems, and observability platforms. Participate in incident response, root-cause analysis, capacity planning, and reliability improvements while collaborating with EDA, networking, storage, and hardware teams.

Develop and implement core firmware features for Mellanox NICs supporting cloud, HPC, and storage networking. Collaborate with architecture and software teams, create verification tests, debug complex hardware/software systems, and contribute to firmware maintenance, qualification, and releases. The role requires strong C/C++ development, networking knowledge, PCIe and virtualization experience, scripting skills, and familiarity with distributed, high-performance computing environments.

Design, develop, integrate, test, and productize perception software for autonomous driving systems. Responsibilities include implementing robust and reusable software components, deploying deep neural network models to embedded real-time platforms, developing verification plans, debugging systems, maintaining documentation, and analyzing real or synthetic benchmark data. The role requires close collaboration with perception engineers and researchers throughout the software development lifecycle.

Leads NVIDIA’s Infrastructure Security Engineering organization for EDA clusters. Builds and operates security controls across compute, storage, and networking in on-premises and multi-cloud environments while preserving performance for long-running workloads. Owns the technical roadmap, security technology lifecycle, automation, instrumentation, compliance evidence, and cross-functional execution. Develops secure-by-default infrastructure and leads teams responsible for scalable enforcement, observability, mitigation, and security outcomes.

Lead technical and strategic partnerships with quantum processing unit builders and federal research organizations. Develop joint roadmaps integrating QPUs with NVIDIA GPUs, networking, and quantum software including CUDA-Q, cuQuantum, CUDA-Q QEC, and NVQLink. Coordinate cross-functional engineering and product teams, create reference architectures, run technical workshops and training, present at conferences, and advise senior scientific leaders on QPU-GPU integration, real-time control, decoding latency, and fault-tolerant quantum computing.

Develop and lead production software-defined networking for NVIDIA’s global GPU cloud infrastructure. Design multi-tenant control and data planes using Open vSwitch, OVN, OpenFlow, Kubernetes, C, and Go. Build networking services, plugins, automation, testing, observability, and reliability improvements. Lead architecture and code reviews, mentor engineers, support on-call operations, and resolve complex production incidents through diagnostics and source-level debugging.

Own end-to-end software integration across firmware, BSP, drivers, GPU software, services, and release systems. Lead system-level debugging of boot failures, crashes, resets, power transitions, performance regressions, and update issues. Analyze logs, traces, crash dumps, and hardware diagnostics to identify root causes, automate failure classification, integrate partner software, and coordinate cross-functional resolution across firmware, kernel, hardware, architecture, and OS teams.

Architects and develops datacenter power and performance-management software, including real-time controllers, dynamic provisioning, power policies, and hardware-software interfaces. Responsibilities span architecture, pre-silicon validation, silicon bring-up, productization, deployment, and production support. The role investigates complex firmware, driver, hardware, and platform issues; develops validation automation; and collaborates with GPU, ASIC, firmware, driver, and datacenter systems teams to optimize performance, power, thermal behavior, reliability, and energy efficiency.

Develop and productize deep learning perception systems for autonomous driving, including traffic signal, sign, road marking, and construction object understanding. Lead end-to-end model development, data-driven improvement, simulation, augmentation, and deployment to embedded platforms. Optimize solutions for accuracy, safety, latency, robustness, and regional generalization while collaborating with data-labeling teams and contributing technical leadership.

Architect and develop low-level GPU power and performance-management software, including P-state management, DVFS, real-time controllers, and power-management policies. Lead features through architecture, validation, silicon bring-up, productization, and deployment. Collaborate across hardware, firmware, driver, validation, and data-center teams while debugging complex system issues and developing automation for performance, power efficiency, stability, and reliability.