Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

The role involves owning physics models, defining manufacturing specifications, and validating designs to ensure product quality and performance. The architect will utilize first-principles thinking and AI to improve workflows and drive alignment across engineering teams.

The Senior DL Algorithms Engineer will optimize deep learning models for performance, analyze bottlenecks, and contribute to open-source frameworks while collaborating across teams for AI model development.

The Senior Developer Relations Manager will advance NVIDIA's adoption in capital markets by integrating AI solutions and collaborating with financial professionals, driving best practices and community engagement.

Provide expert-level technical support for NVIDIA DGX compute/GPU platforms: triage and resolve hardware and software issues on multi-distro Linux, debug installations and interoperability, coordinate with engineering/marketing, create KB articles, and improve support processes. Interact directly with customers via phone/email/conference and apply AI tools for debugging and documentation.

The role involves optimizing and developing software for NVIDIA's deep learning inference ecosystem, requiring collaboration and performance analysis on various models and frameworks.

Analyze and optimize HPC application performance across CPU and multi-node multi-GPU systems by driving compiler and library improvements. Port and tune applications, evaluate compiler/runtime/driver impacts, and collaborate with compiler development and application engineering teams to deliver performance enhancements.

Lead cross-stack adoption of modern toolchains, build and code-health practices, and performance workflows on NVIDIA CPU platforms. Integrate and validate compilers, linkers, cross-compilation, and CI; profile and optimize large codebases; build automation and playbooks; drive integration blockers to owners and communicate measurable before-and-after results to engineering teams and leadership.

Partner with universities and research institutes to design and deploy GPU-accelerated HPC and scientific AI solutions. Architect workflows from high-fidelity simulation to AI surrogates and foundation models, profile and optimize GPU training and inference, and collaborate with internal teams to align technical roadmaps. Support computational physics, multiphysics simulation, and engineering design exploration. Travel up to 20%.

Lead GTM technical engagements with data-platform ISVs to design architectures, build POCs, benchmarks, and enablement for NVIDIA acceleration across analytics, databases, and GenAI workflows. Create reference assets, demos, and training while partnering with product, engineering, sales, and customers.

The Senior Circuit Design Engineer will improve netlist and timing quality in deep submicron technologies, collaborate on circuit design, and mentor junior engineers.