Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

Design and implement CUDA Tile compiler transformations, MLIR dialects, lowering passes, and optimization techniques for NVIDIA GPUs. Optimize tile-based kernel performance across GPU generations, define public APIs, conduct performance analysis, and develop robust software, tests, and debugging workflows. The role requires independent project ownership and collaboration within a product-focused engineering team.

Designs, deploys, maintains, and tunes large-scale HPC and AI clusters. Responsibilities include workload scheduling, infrastructure automation, CI/CD pipelines, monitoring, logging, alerting, storage and networking deployment, bottom-up troubleshooting, methodology documentation, and R&D support. The engineer works across hardware, operating systems, GPU computing, virtualization, cloud platforms, and software stacks to deliver performant, reliable self-service infrastructure.

The role involves validating clocking structures in products, developing test plans, automation, and partnering with design teams to ensure high-quality verification of ASIC designs.

Lead a small team building a new Linux kernel-mode GPU driver: design architecture, implement device/kernel-mode code, collaborate with and upstream patches to the Linux kernel community, and represent NVIDIA in open-source discussions.

Develop end-to-end perception solutions for autonomous driving, leveraging deep learning and data-driven approaches to enhance system accuracy and efficiency.

Develop and improve NVIDIA's proprietary GPU compiler backend in C++. Design and implement compiler passes and optimizations, collaborate with hardware and application teams, and support graphics and compute toolchains for high-performance GPU instruction generation.

Develop and improve NVIDIA’s proprietary GPU compiler backend in C++. Design register allocation passes and compiler optimizations for high-performance GPU machine instructions. Collaborate with compiler, hardware, and application teams on improvements and issue resolution. The role spans deep-learning compiler technology and requires strong compiler code-generation experience, preferably with LLVM, plus robust software engineering, testing, and documentation skills.

Lead strategic developer engagements to drive adoption of NVIDIA AI and accelerated computing. Architect integrations, deliver reference implementations and demos, mentor DevRel teams, and collaborate with partners and internal stakeholders to scale production-ready MarTech and AI solutions using NVIDIA software and hardware.

Prototype and integrate GPU-accelerated distributed data processing, compression, databases, and analytics solutions. Optimize complex data-intensive workloads across heterogeneous CPU/GPU architectures, collaborate on next-generation hardware and software designs, and work with customers and cloud service providers to deploy solutions and influence open standards. The role requires deep expertise in parallel programming, C/C++, accelerator architecture, memory systems, and compression or distributed data systems.

Define high-level SoC subsystem and I/O architecture for LPU products, translate product requirements into architecture and IP specifications, build and validate functional/architectural models (C++, SystemC, Python), and drive tradeoffs across performance, power, reliability, and security while coordinating with IP, firmware, software, RTL, verification, and post-silicon teams.