Top Tech Jobs & Startup Jobs in San Francisco Bay Area, CA

The role involves advancing methods for preparing and understanding multimodal datasets, improving pipelines, and measuring dataset impacts on model performance.

The Engineering Manager will lead the Online Data Systems team, focusing on hyperscale database technology and engineering team development, emphasizing reliability and performance.

The IT Controls Data Engineer will create and maintain data pipelines and automated evidence workflows for IT controls, ensuring compliance and audit readiness.

The Senior Counsel, Corporate (M&A) will lead and support mergers, acquisitions, and corporate transactions, offering strategic advice and collaboration across teams.

The role involves advancing pretraining data quality and curation through research, developing new methods, and building scalable data processing pipelines for OpenAI.

Lead origination, structuring, and negotiation of complex AI partnerships in the semiconductor industry. Identify high-value opportunities, design multi-project programs with technical teams, create commercial narratives and proposals, secure executive alignment, and drive deals from concept through contract signature and program success.

Design, train, and deploy state-of-the-art ML models (LLMs/transformers) to detect and prevent misuse. Collaborate with researchers, engineers, and product to build scalable data pipelines, optimize model performance, run code reviews, and maintain production systems. Lead by example, turn research into production, and monitor models to ensure long-term reliability and safety.

Partner with Product and Partnerships to evaluate, price, and structure consumer growth and media deals. Build detailed financial and operating models, define economic frameworks and guardrails, integrate partnership economics into forecasts, lead negotiation support, measure incrementality and performance, and establish governance to protect unit economics while driving portfolio performance.

Lead microarchitecture and RTL design of on- and off-chip interconnects (NoC, switches, bridges, protocol adapters) for a custom AI accelerator SoC. Drive RTL implementation, verification strategy, performance analysis, physical-design convergence, bring-up, and production readiness. Mentor junior engineers, manage third-party IP engagements, and collaborate across architecture, verification, physical design, firmware, and post-silicon teams to deliver scalable, high-performance interconnect fabrics.

Partner with customers to design, prototype, and deploy AI-enabled cybersecurity workflows using OpenAI models and tooling. Provide technical leadership across AppSec, DevSecOps, vulnerability management, SOC/IR, detection engineering, cloud security, identity, and GRC automation. Build demos, pilots, and reference architectures; define success criteria, data needs, integrations, and safety guardrails; and translate executive outcomes into practitioner-level implementations while producing reusable field assets and product feedback.